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参数资料
| 型号： | ISL95210HRZ-T7A |
| 厂商： | Intersil |
| 文件页数： | 14/20页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 10A 32QFN |
| 标准包装： | 1 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.6 V ~ 2.16 V |
| 输入电压： | 2.97 V ~ 5.5 V |
| PWM 型： | R4 |
| 频率 - 开关： | 400kHz ~ 800kHz |
| 电流 - 输出： | 10A |
| 同步整流器： | 是 |
| 工作温度： | -10°C ~ 100°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-VFQFN 裸露焊盘 |
| 包装： | 标准包装 |
| 供应商设备封装： | 32-QFN（4x6） |
| 其它名称： | ISL95210HRZ-T7ADKR |
ISL95210
dotted red and blue lines represent the time delayed behavior of
VOUT and VCOMP when an integrator is used. The solid red and
blue lines illustrate the increased response of R4? in the
absence of the integrating capacitor.
IOUT
R4?
UNDERVOLTAGE PROTECTION
If the output voltage dips too low during normal operation, the
ISL95210 recognizes a fault condition and shuts down. When
VOUT goes 16% below VDAC, the power-good monitor flags
PGOOD low and tri-states the PHASE node by turning off both
integrated power MOSFETs. In addition, the soft-discharge
MOSFET is turned on to gently pull the output voltage to ground
potential for the next restart.
VCOMP
VOUT
CLASSIC VOLTAGE-MODE OR
CURRENT-MODE ARCHITECTURE
t
The undervoltage fault remains latched until a POR event or EN is
toggled.
OVERVOLTAGE PROTECTION
During normal operation, the output voltage is monitored at all
times to ensure it does not exceed the set point by more than
16%. Excessively high voltages can cause failure to output
capacitors as well as the load. If VOUT goes above 116% of DAC,
the power-good monitor is flagged by toggling PGOOD low and
FIGURE 30. CLASSIC ARCHITECTURES vs R4 ? IDEALIZED
TRANSIENT RESPONSE
DISCONTINUOUS CONDUCTION MODES
The ISL95210 supports two power saving modes of operation
during light load conditions. If FCCM is asserted high, the
regulator remains in continuous conduction mode (CCM) which
offers the best transient response and the most stable operating
frequency.
If the FCCM pin is pulled to ground potential, the regulator is
allowed to operate in full discontinuous conduction mode (DCM)
when the load becomes sufficiently low. In this mode, the
inductor current is monitored and prohibited from going
negative. When the inductor current reaches zero, both internal
power MOSFETs are turned off. The output voltage then decays
solely as a function of load. The power FETs remain off until the
output voltage droops enough to trigger a PWM on pulse.
Because the rate of decay of VOUT scales proportionally with
load, so does the switching frequency. This increases efficiency
as the relatively fixed power loss associated with switching the
power FETs is averaged over the switching period.
If the FCCM pin is left floating, the ISL95210 will operate in audio
mode DCM. This mode operates largely the same as full DCM
mode with one exception; the switching period is monitored cycle
by cycle. If the load diminishes to a point where the switching
frequency begins to drop below ~28kHz, the ISL95210 control
loop will issue a PWM on pulse to ensure the frequency remains
above the upper threshold for human hearing. This allows
flexibility for designs that are sensitive to audio frequency
interference.
The R4? architecture seamlessly enters and exits all power saving
modes to ensure accurate regulation.
Protection and Shutdown Features
The ISL95210 offers a full suite of protection features to reduce
the risk of damage to the IC and load. They include under and
overvoltage monitoring and protection as well as protection
against excessive current and thermal operating conditions.
14
the IC enters overvoltage protection mode.
In overvoltage protection mode, the upper P-Channel MOSFET is
latched off until the fault is cleared. In addition, VOUT is
compared against the reference DAC voltage. If VOUT is above
DAC, the lower N-channel MOSFET is turned on to pull VOUT
down. If VOUT falls below DAC, the lower N-Channel MOSFET is
turned off. This process repeats until the fault condition is
cleared through VCC/PVCC POR or a recycling of the EN pin. This
produces a soft-crowbar action that can effectively pull the
output away from dangerously high voltage levels without
causing the negative voltage swings on VOUT that are present
with full crowbar implementations of overvoltage protection.
OVERCURRENT PROTECTION
If the current draw from the load becomes too high during
operation, the IC protects itself and the load by latching off. The
overcurrent mechanism is implemented as a two-fold protection
scheme.
The ISL95210 continuously monitors the lower N-channel
MOSFET current. It stores the valley of the inductor current each
cycle and compares it against the lower overcurrent protection
(OCP) threshold of 11A nominally. If the OCP threshold is
achieved for 8 consecutive PWM cycles, an overcurrent fault is
detected and the IC is shutdown. In this event, power-good
monitor flags PGOOD low and tri-states both switching power
MOSFETs and turns on the soft-discharge FET. Inductor valley
current is used to ensure that the minimum OCP threshold is
above the maximum ISL95210’s normal maximum load of 10A
regardless of chosen inductor value.
In addition to valley current limit, the upper P-Channel MOSFET
current is continuously monitored. If a catastrophic overcurrent
event is encountered (e.g. short circuit on VOUT), the ISL95210
immediately responds to protect the output by latching both
MOSFETs off and engaging the soft-discharge FET. The
power-good monitor flags PGOOD low and the IC remains latched
off until POR or EN is toggled.
THERMAL PROTECTION
The ISL95210 actively monitors the die temperature to protect
against harmful thermal operating conditions. If the silicon
temperature exceeds +150°C, the controller will suspend
FN6938.4
December 15, 2011
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