参数资料
| 型号： | ISL95872HRUZ-T |
| 厂商： | Intersil |
| 文件页数： | 11/17页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM 16UTQFN |
| 标准包装： | 3,000 |
| PWM 型： | R4 |
| 输出数： | 1 |
| 频率 - 最大： | 300kHz |
| 电源电压： | 4.75 V ~ 5.25 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -10°C ~ 100°C |
| 封装/外壳： | 16-UFQFN |
| 包装： | 带卷 (TR) |
ISL95872
C SEN = ------------------------------------------
R OCSET ? DCR
PHASE
+
DCR
R OCSET
L
V DCR
C SEN
I L
_
V O
C O
L
(EQ. 8)
For example, if L is 1.5μH, DCR is 4.5m Ω , and R OCSET is 9k Ω, the
choice of C SEN = 1.5μH/(9k Ω x 4.5m Ω ) = 0.037μF .
8.5μA
OCSET
VO
+ V ROCSET
R O
_
When an OCP fault is declared, the converter will be latched off
and the PGOOD pin will be asserted low. The fault will remain
latched until the EN pin has been pulled below the falling EN
threshold voltage V ENTHF or if VCC has decayed below the falling
POR threshold voltage VVCC_THF .
Undervoltage
FIGURE 13. OVERCURRENT PROGRAMMING CIRCUIT
Figure 13 shows the overcurrent set circuit. The inductor consists
of inductance L and the DC resistance DCR. The inductor DC
current I L creates a voltage drop across DCR, which is given by
Equation 4:
The UVP fault detection circuit triggers after the FB pin voltage is
below the undervoltage threshold V UVTH for more than 2μs. For
example if the converter is programmed to regulate 1.0V at the FB
pin, that voltage would have to fall below the typical V UVTH
threshold of 84% for more than 2μs in order to trip the UVP fault
latch. In numerical terms, that would be 84% x 1.0V = 0.84V.
V DCR = I L ? DCR
(EQ. 4)
When a UVP fault is declared, the converter will be latched off and
the PGOOD pin will be asserted low. The fault will remain latched
until the EN pin has been pulled below the falling EN threshold
V ROCSET = 8.5 μ A ? R OCSET
The I OCSET current source sinks 8.5μA into the OCSET pin,
creating a DC voltage drop across the resistor R OCSET , which is
given by Equation 5:
(EQ. 5)
The DC voltage difference between the OCSET pin and the VO pin,
which is given by Equation 6:
V OCSET – V VO = V DCR – V ROCSET = I L ? DCR – I OCSET ? R OCSET
(EQ. 6)
The IC monitors the voltage of the OCSET pin and the VO pin.
When the voltage of the OCSET pin is higher than the voltage of
the VO pin for more than 10μs, an OCP fault latches the
converter off.
voltage V ENTHF or if VCC has decayed below the falling POR
threshold voltage V VCC_THF .
Over-Temperature
When the temperature of the IC increases above the rising threshold
temperature T OTRTH , it will enter the OTP state that suspends the
PWM, forcing the LGATE and UGATE gate-driver outputs low. The
status of the PGOOD pin does not change nor does the converter
latch-off. The PWM remains suspended until the IC temperature
falls below the hysteresis temperature T OTHYS at which time normal
PWM operation resumes. The OTP state can be reset if the EN pin is
pulled below the falling EN threshold voltage V ENTHF or if VCC has
decayed below the falling POR threshold voltage VVCC_THF . All other
protection circuits remain functional while the IC is in the OTP state.
It is likely that the IC will detect an UVP fault because in the absence
of PWM, the output voltage decays below the undervoltage
R OCSET = ----------------------------
The value of R OCSET is calculated with Equation 7, which is
written as:
I OC ? DCR
I OCSET
(EQ. 7)
threshold V UVTH .
PGOOD Monitor
The PGOOD pin indicates when the converter is capable of
supplying regulated voltage. The PGOOD pin is an undefined
Where:
- R OCSET ( Ω ) is the resistor used to program the overcurrent
setpoint
- I OC is the output DC load current that will activate the OCP
fault detection circuit
- DCR is the inductor DC resistance
For example, if I OC is 20A and DCR is 4.5m Ω , the choice of
R OCSET is equal to 20A x 4.5m Ω /8.5μA = 10.5k Ω.
Resistor R OCSET and capacitor C SEN form an R-C network to
sense the inductor current. To sense the inductor current
correctly not only in DC operation, but also during dynamic
operation, the R-C network time constant R OCSET C SEN needs to
match the inductor time constant L/DCR. The value of C SEN is
then written as Equation 8:
11
impedance if the VCC pin has not reached the rising POR threshold
V VCC_THR , or if the VCC pin is below the falling POR threshold
V VCC_THF . If there is a fault condition of output overcurrent or
undervoltage, PGOOD is asserted low. The PGOOD pull-down
impedance is 50 Ω.
Unlike the ISL95870, the ISL95872 does not feature overvoltage
protection and PGOOD remains high during an overvoltage event.
Integrated MOSFET Gate-Drivers
The LGATE pin and UGATE pins are MOSFET driver outputs. The
LGATE pin drives the low-side MOSFET of the converter while the
UGATE pin drives the high-side MOSFET of the converter.
The LGATE driver is optimized for low duty-cycle applications
where the low-side MOSFET experiences long conduction times.
In this environment, the low-side MOSFETs require exceptionally
low r DS(ON) and tend to have large parasitic charges that conduct
FN7974.0
January 26, 2012
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