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参数资料
| 型号： | IXS839BQ2T/R |
| 厂商： | IXYS |
| 文件页数： | 10/11页 |
| 文件大小： | 0K |
| 描述： | IC MOSFET DRIVER SYNC BUCK 10QFN |
| 标准包装： | 2,000 |
| 配置： | 高端和低端，同步 |
| 输入类型： | 非反相 |
| 延迟时间： | 35ns |
| 电流 - 峰： | 2A |
| 配置数： | 1 |
| 输出数： | 2 |
| 高端电压 - 最大（自引导启动）： | 24V |
| 电源电压： | 4.5 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-VFQFN 裸露焊盘 |
| 供应商设备封装： | 10-QFN |
| 包装： | 带卷 (TR) |
IXYS
Theory of Operation
The IXS839/839A/839B are dual MOSFET drivers,
designed to drive two external N-channel power
MOSFETs. The low-side driver is designed to drive
a non- ? oating N-channel power MOSFET and its
output is out of phase with the PWM input. The
high-side driver is designed to drive a ? oating N-
channel power MOSFET and its output is in phase
with the PWM input. An external bootstrap circuit
provides the ? oating power supply to the high-side
driver.
The bootstrap circuit consists of a Schottky diode
and a boost capacitor. When the PWM input
transitions to a logic low, the low-side power
MOSFET turns ON, the SW node is pulled to
ground, and the bootstrap capacitor is charged to
VDD through the Schottky diode. When the PWM
transitions to a logic high, the high side power
MOSFET begins to turn on and the SW node rises
up to the input supply, VIN. In turn the boost
capacitor raises the BST node voltage to a level
equal to the input supply plus the boost capacitor
voltage, providing sufficient voltage to the BST
node to turn on the High-Side Power MOSFET. An
internal cross-conduction prevention circuit
monitors both gate driver outputs and allows each
driver output to turn ON only when the other output
driver turns OFF and falls below 1V.
The IXS839A is a cost reduced Driver,
differentiated by the absence of the undervoltage
lockout protection circuit featured in the IXS839 and
IXS839B. IXS839A/B must be enabled using the
SD terminal when the driver supply reaches the
operating range. SD can be used to turn off both
driver outputs to prevent the rapid discharge of the
buck converter output capacitors. An additional
terminal, LSD can be used to turn off the Low-Side
Gate Driver Output. The High-Side Gate Driver
remains active in this mode.
Detailed Circuit Description
(Refer to the Application Diagrams)
The PMW input signal controls both the High Side
and Low Side power MOSFET drivers. The Power
MOSFETs are driven so that the SW node follows
the polarity of the PWM signal.
IXS839 / IXS839A / IXS839B
Low-Side Gate Driver
The Low-Side Gate Driver is designed to drive a
ground referenced N-Channel Power MOSFET. In
a synchronous buck converter application, it drives
the gate of the synchronous recti ? er FET, (Q2).
When the driver is enabled, (IXS839A/B
SD=LSD=VDD), the driver output is 180 ? out of
phase with the PWM input. The internal overlap
protection circuit monitors the High-Side Gate
Driver, and allows the Low-Side Gate Driver to turn
on only when the High-Side Gate Driver output falls
below 1.0 Volt. The supply rails for the Low-Side
Gate Driver are VDD and PGND.
High-Side Gate Driver
The High-Side Gate Driver is designed to drive a
floating N-Channel Power MOSFET referenced to
SW. In a synchronous buck converter application, it
drives the gate of the high side power MOSFET,
(Q1). When the driver is enabled (IXS839A/B
SD=VDD), the driver output is in phase with the
PWM input. The bootstrap supply rails for the High-
Side Gate Driver are BST and SW, and are
generated by an external bootstrap circuit. The
bootstrap circuit consists of a Schottky diode
DBST, and a bootstrap capacitor CBST. During
start up, the SW pin is at ground and the bootstrap
capacitor CBST charges up to VDD through the
Schottky diode DBST. When the PWM input
transitions high the High-Side Gate Driver begins to
turn Q1 ON by transferring charge from the
bootstrap capacitor CBST to the gate of Q1. As Q1
turns on the SW pin will rise up to VIN, forcing the
BST pin to VIN + VBOOSTCAP. This supplies the
required gate to source voltage to Q1. When PWM
transitions low the High-Side Driver and in turn Q1
switch off. When SW falls below 1 Volt the Low-
Side Gate Driver turns on and recharges the
bootstrap capacitor which completes the cycle.
Overlap Protection Circuit
The overlap protection circuit (OPC) monitors the
High Side and Low Side Gate Driver Outputs and
prevents both main power switches, Q1 and Q2,
from being ON at the same time. This inhibits
excessive shoot-through currents and minimizes
the associated losses.
When the PWM input transitions low, Q1 begins to
turn OFF, and Q2 turns ON only when the High-
Side Gate Driver output falls below 1 volt. By
10
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IXS839S1 | 功能描述:功率驱动器IC 2 / 4 Amps 30V 2.2 / 1.2 Ohm Rds RoHS:否 制造商:Micrel 产品:MOSFET Gate Drivers 类型:Low Cost High or Low Side MOSFET Driver 上升时间: 下降时间: 电源电压-最大:30 V 电源电压-最小:2.75 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Tube |
| IXS839S1T/R | 功能描述:功率驱动器IC 2 / 4 Amps 30V 2.2 / 1.2 Ohm Rds RoHS:否 制造商:Micrel 产品:MOSFET Gate Drivers 类型:Low Cost High or Low Side MOSFET Driver 上升时间: 下降时间: 电源电压-最大:30 V 电源电压-最小:2.75 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Tube |
| IXSA10N60B2D1 | 功能描述:IGBT 晶体管 10 Amps 600V 2.5 Rds RoHS:否 制造商:Fairchild Semiconductor 配置: 集电极—发射极最大电压 VCEO:650 V 集电极—射极饱和电压:2.3 V 栅极/发射极最大电压:20 V 在25 C的连续集电极电流:150 A 栅极—射极漏泄电流:400 nA 功率耗散:187 W 最大工作温度: 封装 / 箱体:TO-247 封装:Tube |
| IXSA12N60AU1 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:TRANSISTOR | IGBT | N-CHAN | 600V V(BR)CES | 24A I(C) | TO-263AA |
| IXSA15N120B | 功能描述:IGBT 晶体管 30 Amps 1200V 3.4 Rds RoHS:否 制造商:Fairchild Semiconductor 配置: 集电极—发射极最大电压 VCEO:650 V 集电极—射极饱和电压:2.3 V 栅极/发射极最大电压:20 V 在25 C的连续集电极电流:150 A 栅极—射极漏泄电流:400 nA 功率耗散:187 W 最大工作温度: 封装 / 箱体:TO-247 封装:Tube |
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