参数资料
型号: KAD5612P-17Q72
厂商: Intersil
文件页数: 24/29页
文件大小: 0K
描述: IC ADC 12BIT 170MSPS DUAL 72-QFN
产品培训模块: High-Speed Analog-to-Digital Converters
标准包装: 1
系列: FemtoCharge™
位数: 12
采样率(每秒): 170M
数据接口: 串行,SPI?
转换器数目: 2
功率耗散(最大): 405mW
电压电源: 单电源
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 72-VFQFN 裸露焊盘
供应商设备封装: 72-QFN(10x10)
包装: 托盘
输入数目和类型: 2 个差分,单极
4
FN6803.2
September 9, 2009
Absolute Maximum Ratings
Thermal Information
AVDD to AVSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.4V to 2.1V
OVDD to OVSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.4V to 2.1V
AVSS to OVSS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 0.3V
Analog Inputs to AVSS. . . . . . . . . . . . . . . . . . -0.4V to AVDD + 0.3V
Clock Inputs to AVSS. . . . . . . . . . . . . . . . . . . -0.4V to AVDD + 0.3V
Logic Input to AVSS . . . . . . . . . . . . . . . . . . . . -0.4V to OVDD + 0.3V
Logic Inputs to OVSS. . . . . . . . . . . . . . . . . . . -0.4V to OVDD + 0.3V
Thermal Resistance (Typical, Note 2)
θJA (°C/W)
72 Ld QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
24
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . -65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTE:
2.
θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
Electrical Specifications All specifications apply under the following conditions unless otherwise noted: AVDD = 1.8V, OVDD = 1.8V,
TA = -40°C to +85°C (typical specifications at +25°C), AIN = -1dBFS, fSAMPLE = Maximum Conversion Rate
(per speed grade).
PARAMETER
SYMBOL
CONDITIONS
KAD5612P-25
(Note 3)
KAD5612P-21
(Note 3)
KAD5612P-17
(Note 3)
KAD5612P-12
(Note 3)
UNITS
MIN
TYP
MAX MIN
TYP
MAX MIN
TYP
MAX MIN
TYP
MAX
DC SPECIFICATIONS
Analog Input
Full-Scale Analog
Input Range
VFS
Differential
1.40
1.47
1.54
1.40
1.47
1.54
1.40
1.47
1.54
1.40
1.47
1.54
VP-P
Input Resistance
RIN
Differential
1000
Ω
Input Capacitance
CIN
Differential
1.8
pF
Full Scale Range
Temp. Drift
AVTC
Full Temp
90
ppm/°C
Input Offset Voltage
VOS
-10
±2
10
-10
±2
10
-10
±2
10
-10
±2
10
mV
Gain Error
EG
±2
%
Common-Mode
Output Voltage
VCM
435
535
635
435
535
635
435
535
635
435
535
635
mV
Clock Inputs
Inputs Common
Mode Voltage
0.9
V
CLKP,CLKN Input
Swing
1.8
V
Power Requirements
1.8V Analog Supply
Voltage
AVDD
1.7
1.8
1.9
1.7
1.8
1.9
1.7
1.8
1.9
1.7
1.8
1.9
V
1.8V Digital Supply
Voltage
OVDD
1.7
1.8
1.9
1.7
1.8
1.9
1.7
1.8
1.9
1.7
1.8
1.9
V
1.8V Analog Supply
Current
IAVDD
170
177
158
165
142
152
128
135
mA
1.8V Digital Supply
Current (Note 4)
IOVDD
3mA LVDS
68
76
66
74
64
72
62
70
mA
Power Supply
Rejection Ratio
PSRR
30MHz, 200mVP-P
signal on AVDD
-36
dB
Total Power Dissipation
Normal Mode
PD
3mA LVDS
429
456
405
432
372
405
342
369
mW
KAD5612P
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