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参数资料
| 型号： | KITMPR121EVM |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 9/27页 |
| 文件大小： | 0K |
| 描述： | KIT EVALUATION MPR121 |
| 产品培训模块： | MPR121: Low-Power Touch Sensor |
| 标准包装： | 1 |
| 传感器类型： | 近程 |
| 接口： | USB |
| 电源电压： | 5V，USB |
| 嵌入式： | 否 |
| 已供物品： | 4 个板，线缆，文档 |
| 已用 IC / 零件： | MPR121 |
| 产品目录页面： | 2808 (CN2011-ZH PDF) |
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MPR121
Sensors
Freescale Semiconductor, Inc.
17
baseline value starts from zero, it will require a very long time for the baseline to ramp up. This results in a short period of no
response to touch after the MPR121 is first set to Run Mode. Setting the CL = 2b10 will command the MPR121 to load the initial
baseline value at the beginning of the Run Mode. This shortens the initial baseline ramp-up time so that user will not notice any
delay on touch detection. The MPR121 uses the five high bits of the first measured 10 bit electrode data.
Auto-Configuration Registers (0x7B~0x7F)
For each enabled channel, both the charge time and charge current must be set properly. This is so that a specified amount of
charge field can be built on the sensing pad and that the capacitance can be measured using the internal ADC. When all 13
channels are used, there are total 13 CDCx and 13 CDTx values which need to be configured.
The MPR121 provides an auto-configuration function which is able to automatically search and set the charging parameters.
When autoconfiguration is run, specific CDCx and CDTx combinations for the enabled channels can be obtained automatically.
This eliminates test trials on the prototype device and for further verification on final products. A key task for the design engineer
is to verify if the parameter settings generated by the MPR121 are acceptable. This verification ensures that the settings are
optimized each time MPR121 powers on and that the equipment can operate in many different environments.
The autoconfiguration finds the optimized CDCx and CDTx combination for each channel so that the charge level
(I x T = V) on the each channel is as close as possible to the target setting specified by the designer. An upper and lower setting
limit are used to provide the boundaries necessary to verify if the system is setup to operate correctly. If the autoconfiguration
can not find the proper CDCx and CDTx value, an Out Of Range (OOR) status will be set for that channel.
Autoconfiguration operates each time the MPR121 transitions from Stop Mode to Run Mode. After autoconfiguration is
completed, a set of CDCx and CDTx values for each channel are calculated and automatically loaded into the corresponding
register fields.
If autoconfiguration fails, the MPR121 has an auto-reconfiguration function. Autoreconfiguration runs at each sampling interval
if a channel has OOR status from a failed autoconfiguration. Autoreconfiguration will run until the OOR status is cleared or until
it is disabled.
There are five registers used to control the MPR121 auto-configuration feature. Registers 0x7B and 0x7C are used as the control
registers and registers 0x07D to 0x7F are used to hold the configuration target settings. Refer to application note AN3889 for
more information.
FFI: The FFI bits are the same as the FFI bits in register 0x5C for correct auto-configuration and reconfiguration operations.
ACE: Auto-Configuration Enable. 1: Enable, 0: Disable. When Enabled, the autoconfiguration will operate once at the beginning
of the transition from Stop Mode to Run Mode. This includes search and update of the CDCx and CDTx for each enabled channel
(if SCTS = 0).
ARE: Auto-Reconfiguration Enable. 1: Enable, 0: Disable. When enabled, if the OOR is set for a channel after autoconfiguration,
autoreconfiguration will operate on that channel on each sampling interval until the OOR is cleared.
BVA: Fill the BVA bits same as the CL bits in ECR (0x5E) register.
RETRY: Specifies the number of retries for autoconfiguration and autoreconfiguration if the configuration fails before setting
OOR.
Auto-Configure Control Register 0 (0x7B)
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Read
FFI
RETRY
BVA
ARE
ACE
Write
Auto-Configure Control Register 1 (0x7C)
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Read
SCTS
—
OORIE
ARFIE
ACFIE
Write
—
00 - No retry
01 - retry 2 times
10 - retry 4 times
11 - retry 8 times
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