参数资料
型号: KSZ8851-16MLLI
厂商: Micrel Inc
文件页数: 25/84页
文件大小: 0K
描述: IC MAC CTLR 1PORT W/BUS 48-TQFP
标准包装: 250
控制器类型: 以太网控制器,MAC/PHY
接口: 总线
电源电压: 1.8V,2.5V,3.3V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-LQFP
供应商设备封装: 48-LQFP(7x7)
包装: 托盘
产品目录页面: 1081 (CN2011-ZH PDF)
其它名称: 576-3505
Micrel, Inc.
KSZ8851-16MLL/MLLI
March 11, 2014
31
Revision 2.2
In order to read received frames from RXQ without error, the software driver must use following steps:
When receive interrupt occurred and software driver writes “1” to clear the RX interrupt in ISR register; the KSZ8851 will
update Receive Frame Counter (RXFCTR) Register for this interrupt.
When software driver reads back Receive Frame Count (RXFCTR) Register; the KSZ8851 will update both Receive
Frame Header Status and Byte Count Registers (RXFHSR/RXFHBCR).
When software driver reads back both Receive Frame Header Status and Byte Count Registers (RXFHSR/RXFHBCR);
the KSZ8851 will update next receive frame header status and byte count registers (RXFHSR/RXFHBCR).
EEPROM Interface
It is optional in the KSZ8851-16MLL to use an external EEPROM. The EED_IO (pin 9) must be pulled high to use external
EEPROM otherwise this pin pulled low or floating without EEPROM.
An external serial EEPROM with a standard microwire bus interface is used for non-volatile storage of information such as
the host MAC address. The KSZ8851-16MLL can detect if the EEPROM is a 1KB (93C46) or 4KB (93C66) EEPROM
device (the 93C46 and the 93C66 are typical EEPROM devices). The EEPROM must be organized as 16-bit mode.
If the EED_IO pin is pulled high, then the KSZ8851-16MLL performs an automatic read of the external EEPROM words
0H to 3H after the de-assertion of Reset. The EEPROM values are placed in certain host-accessible registers. EEPROM
read/write functions can also be performed by software read/writes to the EEPCR (0x22) registers.
The KSZ8851-16MLL EEPROM format is given in Table 11.
WORD
15
8
7
0
0H
Reserved
1H
Host MAC Address Byte 2
Host MAC Address Byte 1
2H
Host MAC Address Byte 4
Host MAC Address Byte 3
3H
Host MAC Address Byte 6
Host MAC Address Byte 5
4H – 6H
Reserved
7H-3FH
Not used for KSZ8851-16MLL (available for user to use)
Table 11. KSZ8851-16MLL EEPROM Format
Loopback Support
The KSZ8851-16MLL provides two loopback modes, one is Near-end (Remote) loopback to support for remote diagnostic
of failure at line side, and the other is Far-end (Local) loopback to support for local diagnostic of failure at host side. In
loopback mode, the speed at the PHY port will be set to 100BASE-TX full-duplex mode.
Near-End (Remote) Loopback
Near-end (Remote) loopback is conducted at PHY port 1 of the KSZ8851-16MLL. The loopback path starts at the PHY
port’s receive inputs (RXP1/RXM1), wraps around at the same PHY port’s PMD/PMA, and ends at the PHY port’s transmit
outputs (TXP1/TXM1).
Bit [9] of register P1SCLMD (0xF4) is used to enable near-end loopback. The ports 1 near-end loopback path is illustrated
in the following Figure 9.
Far-End (Local) Loopback
Far-end (Local) loopback is conducted at Host of the KSZ8851-16MLL. The loopback path starts at the host port’s
transmit inputs (Tx data), wraps around at the PHY port’s PMD/PMA, and ends at the host port’s receive outputs (Rx data)
Bit [14] of register P1MBCR (0xE4) is used to enable far-end loopback at host side. The host far-end loopback path is
illustrated in Figure 9.
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