参数资料
型号: KSZ8851-16MLLI
厂商: Micrel Inc
文件页数: 53/84页
文件大小: 0K
描述: IC MAC CTLR 1PORT W/BUS 48-TQFP
标准包装: 250
控制器类型: 以太网控制器,MAC/PHY
接口: 总线
电源电压: 1.8V,2.5V,3.3V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-LQFP
供应商设备封装: 48-LQFP(7x7)
包装: 托盘
产品目录页面: 1081 (CN2011-ZH PDF)
其它名称: 576-3505
2002 Microchip Technology Inc.
DS30325B-page 55
PIC16F7X
8.3
Capture Mode
In Capture mode, CCPR1H:CCPR1L captures the
16-bit value of the TMR1 register when an event occurs
on pin RC2/CCP1. An event is defined as one of the fol-
lowing and is configured by CCPxCON<3:0>:
Every falling edge
Every rising edge
Every 4th rising edge
Every 16th rising edge
An event is selected by control bits CCP1M3:CCP1M0
(CCP1CON<3:0>). When a capture is made, the inter-
rupt request flag bit CCP1IF (PIR1<2>) is set. The
interrupt flag must be cleared in software. If another
capture occurs before the value in register CCPR1 is
read, the old captured value is overwritten by the new
captured value.
8.3.1
CCP PIN CONFIGURATION
In Capture mode, the RC2/CCP1 pin should be config-
ured as an input by setting the TRISC<2> bit.
FIGURE 8-1:
CAPTURE MODE
OPERATION BLOCK
DIAGRAM
8.3.2
TIMER1 MODE SELECTION
Timer1 must be running in Timer mode or Synchro-
nized Counter mode for the CCP module to use the
capture feature. In Asynchronous Counter mode, the
capture operation may not work.
8.3.3
SOFTWARE INTERRUPT
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep bit
CCP1IE (PIE1<2>) clear to avoid false interrupts and
should clear the flag bit CCP1IF following any such
change in operating mode.
8.3.4
CCP PRESCALER
There are four prescaler settings, specified by bits
CCP1M3:CCP1M0. Whenever the CCP module is
turned off, or the CCP module is not in Capture mode,
the prescaler counter is cleared. Any RESET will clear
the prescaler counter.
Switching from one capture prescaler to another may
generate an interrupt. Also, the prescaler counter will
not be cleared, therefore, the first capture may be from
a non-zero prescaler. Example 8-1 shows the recom-
mended method for switching between capture pres-
calers. This example also clears the prescaler counter
and will not generate the “false” interrupt.
EXAMPLE 8-1:
CHANGING BETWEEN
CAPTURE PRESCALERS
8.4
Compare Mode
In Compare mode, the 16-bit CCPR1 register value is
constantly compared against the TMR1 register pair
value. When a match occurs, the RC2/CCP1 pin is:
Driven high
Driven low
Remains unchanged
The action on the pin is based on the value of control
bits CCP1M3:CCP1M0 (CCP1CON<3:0>). At the
same time, interrupt flag bit CCP1IF is set.
FIGURE 8-2:
COMPARE MODE
OPERATION BLOCK
DIAGRAM
Note:
If the RC2/CCP1 pin is configured as an
output, a write to the port can cause a
capture condition.
CCPR1H
CCPR1L
TMR1H
TMR1L
Set Flag bit CCP1IF
(PIR1<2>)
Capture
Enable
Q’s
CCP1CON<3:0>
RC2/CCP1
Prescaler
÷ 1, 4, 16
and
Edge Detect
pin
CLRF
CCP1CON
;Turn CCP module off
MOVLW
NEW_CAPT_PS ;Load the W reg with
;the new prescaler
;move value and CCP ON
MOVWF
CCP1CON
;Load CCP1CON with this
;value
CCPR1H CCPR1L
TMR1H
TMR1L
Comparator
QS
R
Output
Logic
Special Event Trigger
Set Flag bit CCP1IF
(PIR1<2>)
Match
RC2/CCP1
TRISC<2>
CCP1CON<3:0>
Mode Select
Output Enable
Pin
Special Event Trigger will:
clear TMR1H and TMR1L registers
NOT set interrupt flag bit TMR1F (PIR1<0>)
(for CCP2 only) set the GO/DONE bit (ADCON0<2>)
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