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参数资料
型号： KSZ8862-16MQL-FX
厂商： Micrel Inc
文件页数： 7/125页
文件大小： 0K
描述： IC SWITCH ETH 2P 16BIT 128PQFP
标准包装： 66
系列： KSZ8862
控制器类型： 以太网开关控制器
接口： PCI
安装类型： 表面贴装
封装/外壳： 128-BFQFP
供应商设备封装： 128-PQFP（14x20）
包装： 托盘
产品目录页面： 1081 (CN2011-ZH PDF)
配用： 576-1638-ND - BOARD EVALUATION KSZ8862-10FL
576-1637-ND - BOARD EVALUATION KSZ8862-100FX
其它名称： 576-3271
Micrel, Inc.
KSZ8862-16/32MQL
April 2007
104
M9999-040407-3.0
Offset
Counter Name
Description
length (upper limit depends on max packet size setting)
0x14
TxLoPriorityByte
Tx lo-priority good octet count, including PAUSE packets
0x15
TxHiPriorityByte
Tx hi-priority good octet count, including PAUSE packets
0x16
TxLateCollision
The number of times a collision is detected later than 512 bit-times into the Tx of a
packet
0x17
TxPausePkts
Number of PAUSE frames transmitted by a port
0x18
TxBroadcastPkts
Tx good broadcast packets (not including error broadcast or valid multicast packets)
0x19
TxMulticastPkts
Tx good multicast packets (not including error multicast packets or valid broadcast
packets)
0x1A
TxUnicastPkts
Tx good unicast packets
0x1B
TxDeferred
Tx packets by a port for which the 1st Tx attempt is delayed due to the busy medium
0x1C
TxTotalCollision
Tx total collision, half duplex only
0x1D
TxExcessiveCollision
A count of frames for which Tx fails due to excessive collisions
0x1E
TxSingleCollision
Successfully Tx frames on a port for which Tx is inhibited by exactly one collision
0x1F
TxMultipleCollision
Successfully Tx frames on a port for which Tx is inhibited by more than one collision
Table 15. Port 1 MIB Counters Indirect Memory Offset
Format of “All Ports Dropped Packet” MIB Counters
Bit
Default
R/W
Description
30-16
-
N/A
Reserved
15-0
0x0000
RO
Counter Value
Table 16. “All Ports Dropped Packet” MIB Counters Format
Note: “All Ports Dropped Packet” MIB Counters do not indicate overflow or validity; therefore, the application must keep track of
overflow and valid conditions.
“All Ports Dropped Packet” MIB counters are read using indirect memory access. The address offsets for these counters
are shown in Table 17.
Offset
Counter Name
Description
0x100
Port1 TX Drop Packets
TX packets dropped due to lack of resources
0x101
Port2 TX Drop Packets
TX packets dropped due to lack of resources
0x103
Port1 RX Drop Packets
RX packets dropped due to lack of resources
0x104
Port2 RX Drop Packets
RX packets dropped due to lack of resources
Table 17. “All Ports Dropped Packet” MIB Counters Indirect Memory Offsets
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