参数资料
型号: L99PD08
厂商: STMICROELECTRONICS
元件分类: 电源管理
英文描述: POWER SUPPLY MANAGEMENT CKT, PQFP32
封装: ROHS COMPLIANT, LQFP-32
文件页数: 18/41页
文件大小: 750K
代理商: L99PD08
L99PD08
SPI
Doc ID 15872 Rev 3
25/41
6.2.2
Serial data input (SDI)
This input is used to transfer data serially into the device. It receives the data to be written.
Values are latched on the rising edge of Serial Clock (SCK).
6.2.3
Serial data output (SDO)
This output signal is used to transfer data serially out of the device. Data is shifted out on the
falling edge of Serial Clock (SCK).
SDO also reflects the status of the <Global Error Flag> (Bit 7 of the <Global Status
Register>) while CSN is low and no clock signal is present
6.2.4
Chip select not (CSN)
When this input signal is High, the communication interface of the device is deselected and
Serial Data Output (SDO) is high impedance. Driving this input Low enables the
communication. The communication must start and stop on a Low level of Serial Clock
(SCK). A CSN timeout is implemented.
6.3
SPI communication flow
6.3.1
General description
The proposed SPI communication is based on a standard SPI interface structure using CSN
(Chip Select Not), SDI (Serial Data In), SDO (Serial Data Out/Error) and SCK (Serial Clock)
signal lines. Each communication frame consists of an instruction byte which is followed by
1 data byte.
The data returned on DO within the same frame always starts with the <Global Status>
Byte. It provides general status information about the device. It is followed by 1 data byte
containing the current of the addressed register (i. e. ‘In-frame-response’).
6.3.2
Command byte
Each communication frame starts with a command byte. It consists of an operating code
which specifies the type of operation (<Read>, <Write>, <Fault Reset>, <Read Device
Information>) and a 6 bit address.
Note:
OCx: Operating Code
Ax: Address
Table 19.
Command byte
MSB
LSB
Op code
Address
OC1
OC0
A5
A4
A3
A2
A1
A0
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