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参数资料
| 型号： | L99PD08 |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 电源管理 |
| 英文描述： | POWER SUPPLY MANAGEMENT CKT, PQFP32 |
| 封装： | ROHS COMPLIANT, LQFP-32 |
| 文件页数： | 28/41页 |
| 文件大小： | 750K |
| 代理商： | L99PD08 |
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SPI
L99PD08
34/41
Doc ID 15872 Rev 3
Output PWM duty cycle selection, one register per channel. Active only if PWM_EN signal is
set for dedicated output.
b7 … b1 - PWM duty cycle of this channel (256 levels, default value – 50% DC, 80H)
Note:
The values of the duty cycle and the Phase will be captured and executed with the end of
the write command. Be aware, that an unwanted PWM can be generated during this phase.
Output PWM phase shift selection, one register per channel. This feature will improve the
power net characteristic during PWM mode.
b7 … b3 - phase shift of this channel related to the length of 1 PWM period (5 bits - 32
levels).
Note:
The values of the duty cycle and the phase will be captured and executed with the end of the
write command. Be aware, that an unwanted PWM can be generated during this phase.
Table 38.
DUTY_CH 0 – DUTY_CH 7 Registers, hex10 – hex17 (RW-Type)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
b7
b6
b5
b4
b3
b2
b1
b0
Table 39.
PHASE_CH 0 - PHASE_CH7 Registers, hex18 – hex1F (RW-Type)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
b7
b6
b5
b4
b3
-
Default values:
PHASE_CH0
0x00h
(0/32)
PHASE_CH1
0x20h
(4/32)
PHASE_CH2
0x40h
(8/32)
PHASE_CH3
0x60h
(12/32)
PHASE_CH4
0x80h
(16/32)
PHASE_CH5
0xA0h
(20/32)
PHASE_CH6
0xC0h
(24/32)
PHASE_CH7
0xE0h
(28/32)
Table 40.
CHANNEL_FB Registers, hex2E (R-Type)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
CH7
CH6
CH5
CH4
CH3
CH2
CH1
CH0
CHx 0
channel CH x is off
1
channel CH x is on
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