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参数资料
型号： LAMXO256C-3TN100E
厂商： Lattice Semiconductor Corporation
文件页数： 21/77页
文件大小： 0K
描述： IC FPGA AUTO 256LUTS 100-TQFP
标准包装： 90
系列： LA-MachXO
可编程类型： 系统内可编程
最大延迟时间 tpd(1)： 4.9ns
电压电源 - 内部： 1.71 V ~ 3.465 V
宏单元数： 128
输入/输出数： 78
工作温度： -40°C ~ 125°C
安装类型： 表面贴装
封装/外壳： 100-LQFP
供应商设备封装： 100-TQFP（14x14）
包装： 托盘
其它名称： 220-1637
LAMXO256C-3TN100E-ND
3-2
DC and Switching Characteristics
Lattice Semiconductor
LA-MachXO Automotive Family Data Sheet
DC Electrical Characteristics
Over Recommended Operating Conditions
LA-MachXO1200 and LA-MachXO2280 Hot Socketing Specications
1, 2, 3, 4
1. Insensitive to sequence of VCC, VCCAUX, and VCCIO. However, assumes monotonic rise/fall rates for VCC, VCCAUX, and VCCIO.
2. 0 ≤ VCC ≤ VCC (MAX), 0 ≤ VCCIO ≤ VCCIO (MAX), and 0 ≤ VCCAUX ≤ VCCAUX (MAX).
3. IDK is additive to IPU, IPW or IBH.
4. LVCMOS and LVTTL only.
Symbol
Parameter
Condition
Min.
Typ.
Max.
Units
Non-LVDS General Purpose sysIOs
IDK
Input or I/O Leakage Current
0 ≤ VIN ≤ VIH (MAX.)
—
+/-1000
A
LVDS General Purpose sysIOs
IDK_LVDS
Input or I/O Leakage Current
VIN ≤ VCCIO
—
+/-1000
A
VIN > VCCIO
—35—
mA
Symbol
Parameter
Condition
Min.
Typ.
Max.
Units
IIL, IIH
1, 4, 5
Input or I/O Leakage
0 ≤ VIN ≤ (VCCIO - 0.2V)
—
10
A
(VCCIO - 0.2V) < VIN ≤ 3.6V
—
40
A
IPU
I/O Active Pull-up Current
0 ≤ VIN ≤ 0.7 VCCIO
-30
—
-150
A
IPD
I/O Active Pull-down Current
VIL (MAX) ≤ VIN ≤ VIH (MAX)
30
—
150
A
IBHLS
Bus Hold Low sustaining current
VIN = VIL (MAX)
30
—
A
IBHHS
Bus Hold High sustaining current
VIN = 0.7VCCIO
-30
—
A
IBHLO
Bus Hold Low Overdrive current
0 ≤ VIN ≤ VIH (MAX)
—
150
A
IBHHO
Bus Hold High Overdrive current
0 ≤ VIN ≤ VIH (MAX)
—
-150
A
VBHT
3
Bus Hold trip Points
0 ≤ VIN ≤ VIH (MAX)
VIL (MAX)
—
VIH (MIN)
V
C1
I/O Capacitance
2
VCCIO = 3.3V, 2.5V, 1.8V, 1.5V, 1.2V,
VCC = Typ., VIO = 0 to VIH (MAX)
—8
—
pf
C2
Dedicated Input Capacitance
2
VCCIO = 3.3V, 2.5V, 1.8V, 1.5V, 1.2V,
VCC = Typ., VIO = 0 to VIH (MAX)
—8
—
pf
1. Input or I/O leakage current is measured with the pin congured as an input or as an I/O with the output driver tri-stated. It is not measured
with the output driver active. Bus maintenance circuits are disabled.
2. TA 25°C, f = 1.0MHz
3. Please refer to VIL and VIH in the sysIO Single-Ended DC Electrical Characteristics table of this document.
4. Not applicable to SLEEPN pin.
5. When VIH is higher than VCCIO, a transient current typically of 30ns in duration or less with a peak current of 6mA can occur on the high-to-
low transition. For LA-MachXO1200 and LA-MachXO2280 true LVDS output pins, VIH must be less than or equal to VCCIO.
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相关代理商/技术参数
参数描述
LAMXO256E 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:LA-MachXO Automotive Family Data Sheet
LAMXO256E-3TN100E 功能描述:CPLD - 复杂可编程逻辑器件 Auto Grade (AEC-Q100 ) MachXO256E RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100
LAMXO256LUTSC-3FTN256E 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:LA-MachXO Automotive Family Data Sheet
LAMXO256LUTSC-3FTN324E 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:LA-MachXO Automotive Family Data Sheet
LAMXO256LUTSC-3TN100E 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:LA-MachXO Automotive Family Data Sheet
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