参数资料
型号: LAMXO256C-3TN100E
厂商: Lattice Semiconductor Corporation
文件页数: 29/77页
文件大小: 0K
描述: IC FPGA AUTO 256LUTS 100-TQFP
标准包装: 90
系列: LA-MachXO
可编程类型: 系统内可编程
最大延迟时间 tpd(1): 4.9ns
电压电源 - 内部: 1.71 V ~ 3.465 V
宏单元数: 128
输入/输出数: 78
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 100-LQFP
供应商设备封装: 100-TQFP(14x14)
包装: 托盘
其它名称: 220-1637
LAMXO256C-3TN100E-ND
3-9
DC and Switching Characteristics
Lattice Semiconductor
LA-MachXO Automotive Family Data Sheet
Table 3-1. LVDS DC Conditions
Over Recommended Operating Conditions
BLVDS
The LA-MachXO automotive family supports the BLVDS standard through emulation. The output is emulated using
complementary LVCMOS outputs in conjunction with a parallel external resistor across the driver outputs. The
input standard is supported by the LVDS differential input buffer on certain devices. BLVDS is intended for use
when multi-drop and bi-directional multi-point differential signaling is required. The scheme shown in Figure 3-2 is
one possible solution for bi-directional multi-point differential signals.
Figure 3-2. BLVDS Multi-point Output Example
Parameter
Description
Typical
Units
ZOUT
Output impedance
20
Ω
RS
Driver series resistor
294
Ω
RP
Driver parallel resistor
121
Ω
RT
Receiver termination
100
Ω
VOH
Output high voltage
1.43
V
VOL
Output low voltage
1.07
V
VOD
Output differential voltage
0.35
V
VCM
Output common mode voltage
1.25
V
ZBACK
Back impedance
100
Ω
IDC
DC output current
3.66
mA
Heavily loaded backplane, effective Zo ~ 45 to 90 ohms differential
2.5V
80
45-90 ohms
80
2.5V
+
-
. . .
+
-
. . .
+
-
+
-
16mA
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