参数资料
型号: LC51024MV-52F672C
厂商: Lattice Semiconductor Corporation
文件页数: 19/99页
文件大小: 0K
描述: IC XPLD 1024MC 5.2NS 672FPBGA
标准包装: 40
系列: ispXPLD® 5000MV
可编程类型: 系统内可编程
最大延迟时间 tpd(1): 5.2ns
电压电源 - 内部: 3 V ~ 3.6 V
逻辑元件/逻辑块数目: 32
宏单元数: 1024
输入/输出数: 381
工作温度: 0°C ~ 90°C
安装类型: 表面贴装
封装/外壳: 672-BBGA
供应商设备封装: 672-FPBGA(27x27)
包装: 托盘
Lattice Semiconductor
ispXPLD 5000MX Family Data Sheet
22
Absolute Maximum Ratings
1, 2, 3
ispXPLD 5000MC
ispXPLD 5000MB/V
1.8V
2.5V/3.3V
Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . -0.5 to 2.5V . . . . . . . . . . . . . . . . -0.5 to 5.5V
PLL Supply Voltage (VCCP) . . . . . . . . . . . . . . . . . . -0.5 to 2.5V . . . . . . . . . . . . . . . . -0.5 to 5.5V
Output Supply Voltage (VCCO) . . . . . . . . . . . . . . . . -0.5 to 4.5V . . . . . . . . . . . . . . . . -0.5 to 4.5V
IEEE 1149.1 TAP Supply Voltage (VCCJ) . . . . . . . . -0.5 to 4.5V . . . . . . . . . . . . . . . . -0.5 to 4.5V
Input Voltage Applied
4, 5 . . . . . . . . . . . . . . . . . . . . . -0.5 to 5.5V . . . . . . . . . . . . . . . . -0.5 to 5.5V
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . -65 to 150
C . . . . . . . . . . . . . . . -65 to 150C
Junction Temperature (TJ) with Power Applied . . . -55 to 150C . . . . . . . . . . . . . . . -55 to 150C
1. Stress above those listed under the “Absolute Maximum Ratings” may cause permanent damage to the device. Functional
operation of the device at these or any other conditions above those indicated in the operational sections of this specification
is not implied (while programming, following the programming specifications).
2. Compliance with the Lattice Thermal Management document is required.
3. All voltages referenced to GND.
4. Overshoot and Undershoot of -2V to (VIHMAX +2) volts not to exceed 6V is permitted for a duration of <20ns.
5. A maximum of 64 I/Os per device with VIN > 3.6V is allowed.
Recommended Operating Conditions
E
2CMOS Erase Reprogram Specifications
Hot Socketing Characteristics
1, 2, 3, 4
Symbol
Parameter
Min.
Max.
Units
VCC
Supply Voltage for 1.8V Devices (ispXPLD 5000MC)
1.65
1.95
V
Supply Voltage for 2.5V Devices (ispXPLD 5000MB)
2.3
2.7
V
Supply Voltage for 3.3V Devices (ispXPLD 5000MV)
3
3.6
V
VCCP
PLL Block Supply Voltage for PLL 1.8V Devices
1.65
1.95
V
PLL Block Supply Voltage for PLL 2.5V Devices
2.3
2.7
V
PLL Block Supply Voltage for PLL 3.3V Devices
3
3.6
V
TJ
Junction Temperature (Commercial Operation)
0
90
C
Junction Temperature (Industrial Operation)
-40
105
C
Parameter
Min.
Max.
Units
Erase/Reprogram Cycle
1
1,000
Cycles
1. Valid over commercial temperature range.
Symbol
Parameter
Condition
Min.
Typ.
Max.
Units
IDK
Input or I/O Leakage Current
0 VIN 3.0V
+/-50
+/-800
A
1. Insensitive to sequence of VCC and VCCO when VCCO 1.0V. For VCCO > 1.0V, VCC min must be present. However, assumes monotonic
rise/fall rates for VCC and VCCO, provided (VIN - VCCO) 3.6V.
2. 0 VCC VCC (MAX), 0 VCCO VCCO (MAX)
3. IDK is additive to IPU, IPD or IBH. Device defaults to pull-up until non-volatile cells are active.
4. LVTTL, LVCMOS only.
SELECT
DEVICES
DISCONTINUED
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