参数资料
型号: LC5512MC-75Q208I
厂商: LATTICE SEMICONDUCTOR CORP
元件分类: PLD
中文描述: EE PLD, 9.5 ns, PQFP208
封装: PLASTIC, QFP-208
文件页数: 43/95页
文件大小: 923K
代理商: LC5512MC-75Q208I
Lattice Semiconductor
ispXPLD 5000MX Family Data Sheet
48
Switching Test Conditions
Figure 21 shows the output test load that is used for AC testing. The specific values for resistance, capacitance,
voltage, and other test conditions are shown in Table 14.
Figure 21. Output Test Load, LVTTL and LVCMOS Standards
Table 14. Test Fixture Required Components
Test Condition
R1
R2
CL
Timing Ref.
VCCO
Default LVCMOS 1.8 I/O (L -> H, H -> L)
106
35pF
VCCO/2
1.8V
LVCMOS I/O (L -> H, H -> L)
35pF
LVCMOS3.3 = 1.5V
LVCMOS3.3 = 3.0V
LVCMOS2.5 = VCCO/2
LVCMOS2.5 = 2.3V
LVCMOS1.8 = VCCO/2
LVCMOS1.8 = 1.65V
Default LVCMOS 1.8 I/O (Z -> H)
106
35pF
VCCO/2
1.65V
Default LVCMOS 1.8 I/O (Z -> L)
106
35pF
VCCO/2
1.65V
Default LVCMOS 1.8 I/O (H -> Z)
106
5pF
VOH - 0.15
1.65V
Default LVCMOS 1.8 I/O (L -> Z)
106
5pF
VOL + 0.15
1.65V
Note: Output test conditions for all other interfaces are determined by the respective standards.
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