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参数资料
| 型号： | LC72130 |
| 厂商： | SANYO SEMICONDUCTOR CO LTD |
| 元件分类： | PLL合成/DDS/VCOs |
| 英文描述： | PLL FREQUENCY SYNTHESIZER, 40 MHz, PDIP24 |
| 封装： | SDIP-24 |
| 文件页数： | 13/22页 |
| 文件大小： | 306K |
| 代理商： | LC72130 |
Clock Time Base Usage Notes
The pull-up resistor used on the clock time base output pin (BO1) should be at least 100 k
. Also, to prevent chattering
we recommend using a Schmitt input at the controller (microprocessor) that receives this signal.
This is to prevent degrading the VCO C/N characteristics when a loop filter is formed using the built-in low-pass filter
transistor. Since the clock time base output pin and the low-pass filter have a common ground internal to the IC, it is
necessary to minimize the time base output pin current fluctuations and to suppress their influence on the low-pass filter.
Other Items
1. Notes on the Phase Comparator Dead Zone
Since correction pulses are output from the charge pump even if the PLL is locked when the charge pump is in the
ON/ON state, the loop can easily become unstable. This point requires special care when designing application
circuits.
The following problems may occur in the ON/ON state.
Side band generation due to reference frequency leakage
Side band generation due to both the correction pulse envelope and low frequency leakage
Schemes in which a dead zone is present (OFF/OFF) have good loop stability, but have the problem that acquiring a
high C/N ratio can be difficult. On the other hand, although it is easy to acquire a high C/N ratio with schemes in
which there is no dead zone, it is difficult to achieve high loop stability. Therefore, it can be effective to select DZA
or DZB, which have no dead zone, in applications which require an FM S/R ratio in excess of 90 to 100 dB, or in
which an increased AM stereo pilot margin is desired. On the other hand, we recommend selecting DZC or DZD,
which provide a dead zone, for applications which do not require such a high FM signal-to-noise ratio and in which
either AM stereo is not used or an adequate AM stereo pilot margin can be achieved.
No. 4973-20/22
LC72130, 72130M
DZ1
DZ0
Dead zone mode
Charge pump
Dead zone
0
DZA
ON/ON
– –0 s
0
1
DZB
ON/ON
–0 s
1
0
DZC
OFF/OFF
+0 s
1
DZD
OFF/OFF
+ +0 s
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| LC7218M | PLL FREQUENCY SYNTHESIZER, 40 MHz, PDSO24 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LC72130-D-E | 制造商:ON Semiconductor 功能描述:PLL FREQUENCY SYNTHESIZER - Ammo Pack 制造商:ON Semiconductor 功能描述:FNFLD / PLL FREQUENCY SYNTHESIZER |
| LC72130-E | 功能描述:时钟合成器/抖动清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| LC72130M | 制造商:SANYO 制造商全称:Sanyo Semicon Device 功能描述:AM/FM PLL Frequency Synthesizer |
| LC72131 | 制造商:SANYO 制造商全称:Sanyo Semicon Device 功能描述:AM/FM PLL Frequency Synthesizer |
| LC72131D | 制造商:Panasonic Industrial Company 功能描述:IC |
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