- 您现在的位置：买卖IC网 > PDF目录69004 > LC72130 (SANYO SEMICONDUCTOR CO LTD) PLL FREQUENCY SYNTHESIZER, 40 MHz, PDIP24 PDF资料下载
参数资料
| 型号： | LC72130 |
| 厂商： | SANYO SEMICONDUCTOR CO LTD |
| 元件分类： | PLL合成/DDS/VCOs |
| 英文描述： | PLL FREQUENCY SYNTHESIZER, 40 MHz, PDIP24 |
| 封装： | SDIP-24 |
| 文件页数： | 2/22页 |
| 文件大小： | 306K |
| 代理商： | LC72130 |
2. DI Control Data Functions
No. 4973-10/22
LC72130, 72130M
No.
Control block/data
Functions
Related data
Programmable divider data Sets the programmable divider divisor.
P0 to P15
This value is a binary value whose MSB is P15. The position of the LSB varies
depending on DVS and SNS. (*: don’t care)
Note: P0 to P3 are ignored when P4 is the LSB.
DVS, SNS
These bits select the signal input pin for the programmable divider and switch the input
frequency range. (*: don’t care)
Note: See the “Programmable Divider” item for more information.
Reference divider data
Selects the reference frequency (fref).
R0 to R3
Note: PLL INHIBIT
The programmable divider block and the IF counter block are stopped, the FMIN,
AMIN, and IFIN pins are set to the pull-down state (ground), and the charge pump
goes to the high impedance state.
XS
Crystal resonator selection
XS = 0: 4.5 MHz
XS = 1: 7.2 MHz
The 7.2 MHz frequency is selected after the power ON reset.
IF counter control data
IF counter measurement start data
CTE
CTE = 1: Counter start
CTE = 0: Counter reset
GT0, GT1
Determines the IF counter measurement period.
Note: See the “IF Counter” item for more information.
I/O port specification data
Specifies the I/O direction for the bidirectional pins IO1 and IO2.
IOC1, IOC2
Data: 0 = input mode, 1 = output mode
Output port data
Data that determines the output from the BO1 to BO5, IO1 and IO2 output ports
BO1 to BO5, IO1, IO2
Data: 0 = open, 1 = low
The data = 0 (open) state is selected after the power ON reset.
(1)
(2)
(3)
(4)
(5)
IOC1
IOC2
DVS
SNS
LSB
Divisor setting (N)
Actual divisor
1
*
P0
272 to 65535
Twice the value of the setting
0
1
P0
272 to 65535
The value of the setting
0
P4
4 to 4095
The value of the setting
DVS
SNS
Input pin
Input frequency range
1
*
FMIN
10 to 160 MHz
0
1
AMIN
2 to 40 MHz
0
AMIN
0.5 to 10 MHz
GT1
GT0
Measurement time (ms)
Wait time (ms)
0
4
3 to 4
0
1
8
3 to 4
1
0
32
7 to 8
1
64
7 to 8
R3
R2
R1
R0
Reference frequency (kHz)
0
100
0
1
50
0
1
0
25
0
1
25
0
1
0
12.5
0
1
0
1
6.25
0
1
0
3.125
0
1
3.125
1
0
10
1
0
1
9
1
0
1
0
5
1
0
1
0
3
1
0
1
15
1
0
PLL INHIBIT + X’tal OSC STOP
1
PLL INHIBIT
Continued on next page.
IFS
相关PDF资料 |
PDF描述 |
|---|---|
| LC7218 | PLL FREQUENCY SYNTHESIZER, 40 MHz, PDIP24 |
| LC7218JM | PLL FREQUENCY SYNTHESIZER, 40 MHz, PDSO24 |
| LC7218M | PLL FREQUENCY SYNTHESIZER, 40 MHz, PDSO24 |
| LIS3L02AS5 | SPECIALTY ANALOG CIRCUIT, PDSO24 |
| LIS3L02AS5TR | SPECIALTY ANALOG CIRCUIT, PDSO24 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| LC72130-D-E | 制造商:ON Semiconductor 功能描述:PLL FREQUENCY SYNTHESIZER - Ammo Pack 制造商:ON Semiconductor 功能描述:FNFLD / PLL FREQUENCY SYNTHESIZER |
| LC72130-E | 功能描述:时钟合成器/抖动清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| LC72130M | 制造商:SANYO 制造商全称:Sanyo Semicon Device 功能描述:AM/FM PLL Frequency Synthesizer |
| LC72131 | 制造商:SANYO 制造商全称:Sanyo Semicon Device 功能描述:AM/FM PLL Frequency Synthesizer |
| LC72131D | 制造商:Panasonic Industrial Company 功能描述:IC |
发布紧急采购，3分钟左右您将得到回复。