参数资料
型号: LC75806PT-H
厂商: ON Semiconductor
文件页数: 26/35页
文件大小: 0K
描述: IC LCD DISPL DVR KEY-INP 100TQFP
标准包装: 90
系列: *
LC75806PT
3. Pin states during the reset period
Pin
S1/P1 to S8/P8
S9 to S73
COM1 to COM3
COM4/S74
KS1/S75, KS2/S76
KS3 to KS6
P9/S77
OSC
DO
State during reset
L *6
L
L
L *7
L *6
L *8
L *9
Z *10
H *11
Note: * 6. These output pins are forcibly set to the segment output function and held low.
* 7. This output pin is forcibly set to the common output function and held low.
* 8. These output pins are forcibly held fixed at the low level.
* 9. This output pin is forcibly set to the general-purpose output port function and held low.
* 10. This I/O pin is forcibly set to the high-impedance state.
* 11.Since this output pin is an open-drain output, a pull-up resistor of between 1 and 10k Ω is required. This pin
remains high during the reset period even if a key data read operation is performed.
Notes on the OSC Pin Peripheral Circuit
1. RC oscillator operationg mode (Control data bit OC=0)
When RC oscillator operationg mode is selected, an external resistor ROSC and an external capacitor COSC must be
connected between the OSC pin and GND.
OSC
ROSC
COSC
2. External clock operating mode (Control data bit OC=1 )
When selecting the external clock operating mode, connect a current protection resistor Rg (4.7 to 47k Ω ) between the
OSC pin and the external clock output pin (external oscillator). Determine the value of the resistance according to the
maximum allowable current value of the external clock output pin. Also make sure that the waveform of the external
clock is not excessively distorted.
External clock output pin
External oscillator
Rg
OSC
Note: Allowable current value at external clock output pin >
VDD
Rg
No.A1425-26/35
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