参数资料
型号: LC75806PT-H
厂商: ON Semiconductor
文件页数: 7/35页
文件大小: 0K
描述: IC LCD DISPL DVR KEY-INP 100TQFP
标准包装: 90
系列: *
LC75806PT
Pin Functions
Handling
Symbol
Pin No.
Function
Active
I/O
when
unused
S1/P1 to S8/P8
S9 to S73
COM1 to COM3
COM4/S74
1 to 8
9 to 73
77 to 75
74
Segment outputs for displaying the display data transferred by serial data
input. The S1/P1 to S8/P8 pins can be used as general-purpose output ports
under serial data control.
Common driver outputs.
The frame frequency is fO[Hz].
The COM4/S74 pin can be used as a segment output in 1/3 duty.
-
-
O
O
OPEN
OPEN
Key scan outputs. Although normal key scan timing lines require diodes to
KS1/S75
KS2/S76
KS3 to KS6
78
79
80 to 83
be inserted in the timing lines to prevent shorts, since these outputs are
unbalanced CMOS transistor outputs, these outputs will not be damaged by
shorting when these outputs are used to form a key matrix. The KS1/S75
and KS2/S76 pins can be used as segment outputs when so specified by the
-
O
OPEN
control data.
KI1 to KI5
84 to 88
Key scan inputs.
These pins have built-in pull-down resistors.
H
I
GND
General-purpose output port.
P9/S77
89
This pin can be used as clock output port or segment output port under
-
O
OPEN
serial data control.
Oscillator connections. An oscillator circuit is formed by connecting an
OSC
95
external resistor and capacitor at this pin. This pin can also be used as the
external clock input pin if the external clock operating mode is selected with
-
I/O
VDD
the control data.
CE
98
Serial data interface connections to the controller. Note that DO, being an
H
I
open-drain output, requires a pull-up resistor.
CL
99
CE: Chip enable
I
GND
DI
100
CL: Synchronization clock
-
I
DI: Transfer data
DO
97
DO: Output data
-
O
OPEN
Reset signal input
? RES=Low ····· Display off
- S1/P1 to S8/P8, KS1/S75, KS2/S76=Low
(These pins are forcibly set to the segment output port function and
fixed at the low level.)
- S9 to S73=Low
- COM1 to COM3=Low
- COM4/S74=Low
(This pin is forcibly set to the common output function and fixed at the
low level.)
- P9/S77=Low
(This pin is forcibly set to the general-purpose output port function and
RES
96
fixed at the low level.)
L
I
VDD
- KS3 to KS6=Low
- Key scanning disabled
- All the key data is reset to low.
- OSC=”Z”(High impedance)
- RC oscillation stopped
- Inhibits external clock input
- Display contrast adjustment circuit stopped.
? RES=High ···· Display on
- General-purpose output port state setting is enabled
- Key scanning is enabled.
- RC oscillation enabled (RC oscilltator operating mode)
- Enables external clock input (external clock operating mode)
- Display contrast adjustment circuit operation is enabled.
However, serial data can be transferred when the RES pin is low
TEST
VDD1
VDD2
VDD
VSS
94
91
92
90
93
This pin must be connected to ground.
LCD drive 2/3 bias voltage (middle level) supply pin. This pin can be used to
supply the 2/3 VDD0 voltage level externally.
LCD drive 1/3 bias voltage (middle level) supply pin. This pin can be used to
supply the 1/3 VDD0 voltage level externally.
Power supply connections. Provide a voltage of between 4.5 to 6.0V.
Power supply connections. Connect to ground.
-
-
-
-
-
I
I
I
-
-
-
OPEN
OPEN
-
-
No.A1425-7/35
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