参数资料
型号: LC75808W-E
厂商: ON Semiconductor
文件页数: 27/38页
文件大小: 0K
描述: IC LCD DISPLAY DRIVER 100SQFP
标准包装: 60
系列: *
LC75808W
Voltage Detection Type Reset Circuit (VDET)
This circuit generates an output signal and resets the system when logic block power is first applied and when the
voltage drops, i.e., when the logic block power supply voltage is less than or equal to the power down detection voltage
VDET, which is 3.0V, typical. To assure that this function operates reliably, a capacitor must be added to the logic
block power supply line so that the logic block power supply voltage VDD rise time when the logic block power is first
applied and the logic block power supply voltage VDD fall time when the voltage drops are both at least 1 ms. (See
Figure 3, 4, and 5.)
Power Supply Sequence
The following sequences must be observed when power is turned on and off. (See Figure 3, 4, and 5.)
? Power on: Logic block power supply(VDD) on → LCD driver block power supply(VLCD) on
? Power off: LCD driver block power supply(VLCD) off → Logic block power supply(VDD) off
However, if the logic and LCD driver blocks use a shared power supply, then the power supplies can be turned on and
off at the same time.
System Reset
1. Reset Function
The LC75808W performs a system reset with the VDET. When a system reset is applied, the display is turned off,
key scanning is disabled, the key data is reset, and the general-purpose output ports are set to and held at the low
level (VSS). These states that are created as a result of the system reset can be cleared by executing the instruction
described below. (See figure 3, 4, and 5.)
? Clearing the display off state
Transferring all the serial data (the display data and the control data) creates a state in which the display is turned on.
? Clearing the key scan disabled and key data reset states
Transferring the control data not only creates a state in which key scanning can be performed, but also clears the key
data reset.
? Clearing the general-purpose output ports locked at the low level (VSS) state
Transferring the control data clears the general-purpose output ports locked at the low level (VSS) state and sets the
states of the general-purpose output ports.
? 1/8 duty
t1 t2
t3 t4
VDD
VLCD
CE
KC1 to KC6, PC1 to PC4,
VDET
VIL
VDET
Internal data
CT0 to CT3, CTC,
Undefined
Defined
Undefined
SC, SP, DT1, DT2
Internal data (D1 to D120)
Internal data (D121 to D240)
Internal data (D241 to D360)
Internal data (D361 to D480)
Key scan
General-purpose output ports
Display state
Undefined
Undefined
Undefined
Undefined
Disabled
Fixed at the low level (VSS)
Defined
Defined
Defined
Defined
Execution enabled
Can be set to either the high (VDD) or low (VSS) level.
Display off
Display on
Undefined
Undefined
Undefined
Undefined
? t1 ≥ 1 [ms] (Logic block power supply voltage VDD rise time)
? t2 ≥ 0
? t3 ≥ 0
? t4 ≥ 1 [ms] (Logic block power supply voltage VDD fall time)
A12918
Figure 3
No.6370-27/38
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