参数资料
型号: LC75808W-E
厂商: ON Semiconductor
文件页数: 6/38页
文件大小: 0K
描述: IC LCD DISPLAY DRIVER 100SQFP
标准包装: 60
系列: *
LC75808W
Pin Functions
Handling
Symbol
Pin No.
Function
Active
I/O
when
unused
S1 to S60
COM1 to
COM10
1 to 60
70 to 61
Segment driver outputs.
Common driver outputs.
-
-
O
O
OPEN
OPEN
Key scan outputs.
Although normal key scan timing lines require diodes to be inserted in the timing
KS1 to KS6
71 to 76
lines to prevent shorts, since these outputs are unbalanced CMOS transistor
-
O
OPEN
outputs, these outputs will not be damaged by shorting when these outputs are
used to form a key matrix.
KI1 to KI5
P1 to P4
77 to 81
82 to 85
Key scan inputs.
These pins have built-in pull-down resistors.
General-purpose output ports.
H
-
I
O
GND
OPEN
Oscillator connection.
OSC
95
An oscillator circuit is formed by connecting an external resistor and capacitor at
-
I/O
VDD
this pin.
CE
98
Serial data interface connections to the controller. Note that DO, being an open-
H
I
drain output, requires a pull-up resistor.
CL
99
CE: Chip enable
I
GND
DI
100
CL: Synchronization clock
-
I
DI: Transfer data
DO
97
DO: Output data
-
O
OPEN
Input that turns the display off, disables key scanning, and forces the
general-purpose output ports low.
? When INH is low (VSS):
? Display off
S1 to S60 = “L” (VLCD4).
COM1 to COM10 = “L” (VLCD4).
? General-purpose output ports P1 to P4 = low (VSS)
INH
96
? Key scanning is disabled: KS1 to KS6 = low (VSS)
L
I
VDD
? All the key data is reset to low.
? When INH is high (VDD):
? Display on
? The states of the general-purpose output ports can be set by the PC1 to PC4
control data.
? Key scanning is enabled.
However, serial data can be transferred when the INH pin is low.
TEST
94
This pin must be connected to ground.
-
I
-
LCD drive 4/4 bias voltage (high level) supply pin. The level on this pin can be
changed by the display contrast adjustment circuit.
VLCD0
88
However, (VLCD0 - VLCD4) must be greater than or equal to 4.5V.
-
O
OPEN
Also, external power must not be applied to this pin since the pin circuit includes
the display contrast adjustment circuit.
VLCD1
VLCD2
VLCD3
89
90
91
LCD drive 3/4 bias voltage (middle level) supply pin. This pin can be used to
supply the 3/4 (VLCD0 - VLCD4) voltage level externally.
LCD drive 2/4 bias voltage (middle level) supply pin. This pin can be used to
supply the 2/4 (VLCD0 - VLCD4) voltage level externally.
LCD drive 1/4 bias voltage (middle level) supply pin. This pin can be used to
supply the 1/4 (VLCD0 - VLCD4) voltage level externally.
-
-
-
I
I
I
OPEN
OPEN
OPEN
LCD drive 0/4 bias voltage (low level) supply pin. Fine adjustment of the display
VLCD4
92
contrast can be implemented by connecting an external variable resistor to this pin.
However, (VLCD0 - VLCD4) must be greater than or equal to 4.5V, and VLCD4
-
I
GND
must be in the range 0 V to 1.5V, inclusive.
VDD
86
Logic block power supply connection. Provide a voltage of between 4.5 and 6.0V.
-
-
-
LCD driver block power supply connection. Provide a voltage of between 7.0 and
VLCD
87
11.0V when the display contrast adjustment circuit is used and provide a voltage of
-
-
-
between 4.5 and 11.0V when the circuit is not used.
VSS
93
Power supply connection. Connect to ground.
-
-
-
No.6370-6/38
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