参数资料
型号: LCMXO1200C-5FTN256C
厂商: Lattice Semiconductor Corporation
文件页数: 21/88页
文件大小: 0K
描述: IC PLD 1200LUTS 211I/O 256-BGA
标准包装: 90
系列: MachXO
可编程类型: 系统内可编程
最大延迟时间 tpd(1): 3.6ns
电压电源 - 内部: 1.71 V ~ 3.465 V
宏单元数: 600
输入/输出数: 211
工作温度: 0°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 256-LBGA
供应商设备封装: 256-FTBGA(17x17)
包装: 托盘
其它名称: 220-1180
Architecture
MachXO Family Data Sheet
Table 2-10. Supported Output Standards
BLVDS, RSDS
Output Standard
Single-ended Interfaces
LVTTL
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
LVCMOS12
LVCMOS33, Open Drain
LVCMOS25, Open Drain
LVCMOS18, Open Drain
LVCMOS15, Open Drain
LVCMOS12, Open Drain
PCI33 3
Differential Interfaces
LVDS 1, 2
2
LVPECL 2
Drive
4mA, 8mA, 12mA, 16mA
4mA, 8mA, 12mA, 14mA
4mA, 8mA, 12mA, 14mA
4mA, 8mA, 12mA, 14mA
4mA, 8mA
2mA, 6mA
4mA, 8mA, 12mA, 14mA
4mA, 8mA, 12mA, 14mA
4mA, 8mA, 12mA, 14mA
4mA, 8mA
2mA, 6mA
N/A
N/A
N/A
N/A
V CCIO (Typ.)
3.3
3.3
2.5
1.8
1.5
1.2
3.3
2.5
2.5
3.3
1. MachXO1200 and MachXO2280 devices have dedicated LVDS buffers.
2. These interfaces can be emulated with external resistors in all devices.
3. Top Banks of MachXO1200 and MachXO2280 devices only.
sysIO Buffer Banks
The number of Banks vary between the devices of this family. Eight Banks surround the two larger devices, the
MachXO1200 and MachXO2280 (two Banks per side). The MachXO640 has four Banks (one Bank per side). The
smallest member of this family, the MachXO256, has only two Banks.
Each sysIO buffer Bank is capable of supporting multiple I/O standards. Each Bank has its own I/O supply voltage
(V CCIO ) which allows it to be completely independent from the other Banks. Figure 2-18, Figure 2-18, Figure 2-20
and Figure 2-21 shows the sysIO Banks and their associated supplies for all devices.
2-18
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