参数资料
型号: LCMXO1200E-5TN144C
厂商: Lattice Semiconductor Corporation
文件页数: 32/88页
文件大小: 0K
描述: IC FPGA 1.2KLUTS 144TQFP
标准包装: 60
系列: MachXO
可编程类型: 系统内可编程
最大延迟时间 tpd(1): 3.6ns
电压电源 - 内部: 1.14 V ~ 1.26 V
宏单元数: 600
输入/输出数: 113
工作温度: 0°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 144-LQFP
供应商设备封装: 144-TQFP(20x20)
包装: 托盘
DC and Switching Characteristics
MachXO Family Data Sheet
sysIO Differential Electrical Characteristics
LVDS
Over Recommended Operating Conditions
Parameter
Symbol
V INP, V INM
V THD
V CM
I IN
V OH
V OL
V OD
? V OD
V OS
? V OS
I OSD
Parameter Description
Input Voltage
Differential Input Threshold
Input Common Mode Voltage
Input current
Output high voltage for V OP or V OM
Output low voltage for V OP or V OM
Output voltage differential
Change in V OD between high and
low
Output voltage offset
Change in V OS between H and L
Output short circuit current
Test Conditions
100mV ? V THD
200mV ? V THD
350mV ? V THD
Power on
R T = 100 Ohm
R T = 100 Ohm
(V OP - V OM ), R T = 100 Ohm
(V OP - V OM )/2, R T = 100 Ohm
V OD = 0V Driver outputs
shorted
Min.
0
+/-100
V THD /2
V THD /2
V THD /2
0.9V
250
1.125
Typ.
1.2
1.2
1.2
1.38
1.03
350
1.25
Max.
2.4
1.8
1.9
2.0
+/-10
1.60
450
50
1.375
50
6
Units
V
mV
V
V
V
μA
V
V
mV
mV
V
mV
mA
LVDS Emulation
MachXO devices can support LVDS outputs via emulation (LVDS25E), in addition to the LVDS support that is avail-
able on-chip on certain devices. The output is emulated using complementary LVCMOS outputs in conjunction with
resistors across the driver outputs on all devices. The scheme shown in Figure 3-1 is one possible solution for
LVDS standard implementation. Resistor values in Figure 3-1 are industry standard values for 1% resistors.
Figure 3-1. LVDS Using External Resistors (LVDS25E)
V CCIO = 2.5
15 8
8 mA
Zo = 100
+
V CCIO = 2.5
15 8
140
100
-
8 mA
On-chip
Off-chip
Off-chip
On-chip
Em u lated
L V DS
B u ffer
N ote: All resistors are ±1 % .
The LVDS differential input buffers are available on certain devices in the MachXO family.
3-6
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