参数资料
型号: LCMXO1200E-5TN144C
厂商: Lattice Semiconductor Corporation
文件页数: 34/88页
文件大小: 0K
描述: IC FPGA 1.2KLUTS 144TQFP
标准包装: 60
系列: MachXO
可编程类型: 系统内可编程
最大延迟时间 tpd(1): 3.6ns
电压电源 - 内部: 1.14 V ~ 1.26 V
宏单元数: 600
输入/输出数: 113
工作温度: 0°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 144-LQFP
供应商设备封装: 144-TQFP(20x20)
包装: 托盘
DC and Switching Characteristics
MachXO Family Data Sheet
Table 3-2. BLVDS DC Conditions 1
Over Recommended Operating Conditions
Nominal
Symbol
Z OUT
R TLEFT
R TRIGHT
V OH
V OL
V OD
V CM
I DC
Description
Output impedance
Left end termination
Right end termination
Output high voltage
Output low voltage
Output differential voltage
Output common mode voltage
DC output current
Zo = 45
100
45
45
1.375
1.125
0.25
1.25
11.2
Zo = 90
100
90
90
1.48
1.02
0.46
1.25
10.2
Units
Ohms
Ohms
Ohms
V
V
V
V
mA
1. For input buffer, see LVDS table.
LVPECL
The MachXO family supports the differential LVPECL standard through emulation. This output standard is emu-
lated using complementary LVCMOS outputs in conjunction with a parallel resistor across the driver outputs on all
the devices. The LVPECL input standard is supported by the LVDS differential input buffer on certain devices. The
scheme shown in Figure 3-3 is one possible solution for point-to-point signals.
Figure 3-3. Differential LVPECL
V CCIO = 3.3V
100 ohms
16mA
V CCIO = 3.3V
150 ohms
100 ohms
+
-
100 ohms
16mA
Transmission line, Zo = 100 ohm differential
On-chip
Off-chip
Off-chip
On-chip
Table 3-3. LVPECL DC Conditions 1
Over Recommended Operating Conditions
Symbol
Z OUT
R P
R T
V OH
V OL
V OD
V CM
Z BACK
I DC
Description
Output impedance
Driver parallel resistor
Receiver termination
Output high voltage
Output low voltage
Output differential voltage
Output common mode voltage
Back impedance
DC output current
Nominal
100
150
100
2.03
1.27
0.76
1.65
85.7
12.7
Units
Ohms
Ohms
Ohms
V
V
V
V
Ohms
mA
1. For input buffer, see LVDS table.
3-8
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