参数资料
型号: LFEC1E-3TN100C
厂商: Lattice Semiconductor Corporation
文件页数: 108/163页
文件大小: 0K
描述: IC FPGA 1.5KLUTS 67I/O 100-TQFP
标准包装: 90
系列: EC
逻辑元件/单元数: 1500
RAM 位总计: 18432
输入/输出数: 67
电源电压: 1.14 V ~ 1.26 V
安装类型: 表面贴装
工作温度: 0°C ~ 85°C
封装/外壳: 100-LQFP
供应商设备封装: 100-TQFP(14x14)
其它名称: 220-1233
3-13
DC and Switching Characteristics
LatticeECP/EC Family Data Sheet
Derating Timing Tables
Logic Timing provided in the following sections of the data sheet and the ispLEVER design tools are worst-case
numbers in the operating range. Actual delays at nominal temperature and voltage for best-case process, can be
much better than the values given in the tables. To calculate logic timing numbers at a particular temperature and
voltage multiply the noted numbers with the derating factors provided below.
The junction temperature for the FPGA depends on the power dissipation by the device, the package thermal char-
acteristics (
JA), and the ambient temperature, as calculated with the following equation:
TJMAX = TAMAX + (Power * JA)
The user must determine this temperature and then use it to determine the derating factor based on the following
derating tables: TJ °C.
Table 3-5. Delay Derating Table for Internal Blocks
TJ °C
Commercial
TJ °C
Industrial
Power Supply Voltage
1.14V1.2V1.26V
-40
0.82
0.77
0.71
-25
0.82
0.76
0.71
0
20
0.890.830.78
25
45
0.93
0.87
0.81
85
105
1.00
0.94
0.89
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