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参数资料
| 型号： | LM27262MTDX/NOPB |
| 厂商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分类： | 稳压器 |
| 英文描述： | SWITCHING CONTROLLER, 345 kHz SWITCHING FREQ-MAX, PDSO48 |
| 封装： | TSSOP-48 |
| 文件页数： | 11/22页 |
| 文件大小： | 1105K |
| 代理商： | LM27262MTDX/NOPB |
Component Selection (Continued)
SinceQ=CxVand the capacitor will be charged to 5V, the
minimum capacitance required is 0.06F. A 0.1F would be a
good choice. In some instances, it’s desirable to add small
resistors between the bootstrap capacitors and the CBOOT
pins of the drivers. This allows the high-side FET’s turn-on to
be slowed down a bit to minimize shoot through currents
associated with the low–side FET’s body diode reverse re-
covery time. This technique avoids slowing the high-side
FET’s turn off transition. A value of 1.0 to 5.0 ohms is usually
adequate.
INPUT CAPACITOR SELECTION
The input capacitors are required to deliver the difference
between the average and instantaneous currents to the
regulator in an effort to control EMI at the input. In sensitive
applications, a small inductor (typically only a few hundred
nanoHenries) should be placed in the line between the input
source and the input capacitors. This is not usually neces-
sary in battery powered devices due to the low impedance of
the power path and the relative insensitivity of the battery rail
to the regulator’s switching noise. The most critical specifi-
cation for the input capacitors is their ripple current capabil-
ity. In a multiphase regulator, there is a significant amount of
input ripple current cancellation, hence a much lower input
capacitor requirement than a comparable single-phase de-
sign. Figure 7 shows the normalized input ripple current for a
given number of phases and duty factor. The inductor ripple
current is assumed to be 30% of full load current for this
analysis. The ripple current percentage only affects the
depth of the cusps in the curves. Be sure to examine the
entire range of input voltage to determine the worst-case
(maximum) ripple current. Multiply the full load output current
by the factor obtained from Figure 7 to determine the RMS
input ripple current.
There should be at least one bulk input capacitor across the
power FETs of each stage. If the ripple current calculation
indicates that more capacitors than this minimum number
are required, they should be distributed evenly across the
input voltage power plane. The plane that interconnects the
phase inputs should be as large as possible in an effort to
ensure good current sharing between the input capacitors.
Be sure and install a good quality ceramic capacitor across
each phase’s FETs for high frequency bypass.
Layout Considerations
Proper PCB layout is critical to having a high current DC-DC
converter work correctly. The most important part of the
layout is the power path. Start with the large, high current
parts and lay them out in a logical power flow. Avoid using
internal layers as the primary high current paths. It’s best to
connect power devices together directly with copper on the
same layer the parts are to be mounted on. Avoid vias as the
primary conductor in the high current paths. Inner layer
copper can be used in parallel with top-side copper to good
advantage. The vias that connect the layers should be al-
lowed to solder fill. Small vias (10mil dia. or less), should be
limited to approximately 1A, while those with internal diam-
eters of 20mils or more may be able to handle 2A or a little
more. In general, adding more vias between layers is better
than fewer.
Once all of the power parts are placed and routed, the
control IC can be placed and connected. Since the LM27262
uses external drivers, there are no large pulse currents in
either V
CC or the ground connection. This allows the chip
ground to be remotely connected to the load’s local ground
sense point. Keep this connection under a couple of inches
in length and be sure it’s a wide trace (0.05 in or more). Avoid
locating the controller between the power switches and the
load. This minimizes ground drops between the load and the
controller. If the controller is located on the side opposite the
CPU from the power stage, there will be essentially no DC
drop across the area of ground plane between the CPU and
the controller.
There should be a good quality ceramic bypass capacitor
placed very close to the IC’s V
CC and ground pins and
connected with very short traces. All of the low level analog
signals associated with the controller should be referenced
back to the IC’s local ground connection at Pin 23. A single
point ground should be established at that pin. Run a ground
trace to such things as the Softstart cap ground, Ilim divider
and external reference if used, from the primary ground pin.
The loop compensation components should be located as
close to pins 34 and 35 as possible. Unlike a typical PWM
controller, the voltage on the softstart capacitor is the actual
reference voltage used by the error amplifier. As such, it is
imperative that the SOFTCAP pin be kept as quite as pos-
sible. Again, the best approach is a dedicated analog
ground, either in the form of a separate trace that daisy
chains to all the grounded control components, or a small
plane that connects to the main ground at the chip ground
pin only.
20083427
FIGURE 7. RMS Input Ripple as a Percentage of DC
Outpout Current vs Duty Factor and Number of Phases
LM27262
www.national.com
19
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