参数资料
型号: LT1766HGN#PBF
厂商: LINEAR TECHNOLOGY CORP
元件分类: 稳压器
英文描述: 3 A SWITCHING REGULATOR, 228 kHz SWITCHING FREQ-MAX, PDSO16
封装: 0.150 INCH, LEAD FREE, PLASTIC, SSOP-16
文件页数: 16/28页
文件大小: 284K
代理商: LT1766HGN#PBF
23
LT1766/LT1766-5
1766fb
APPLICATIO S I FOR ATIO
WU
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When using RC, the maximum value has two limitations.
First, the combination of output capacitor ESR and RC may
stop the loop rolling off altogether. Second, if the loop gain
is not rolled off sufficiently at the switching frequency,
output ripple will peturb the VC pin enough to cause
unstable duty cycle switching similar to subharmonic
oscillations. If needed, an additional capacitor CF can be
added across the RC/CC network from the VC pin to ground
to further suppress VC ripple voltage.
With a tantalum output capacitor, the LT1766 already
includes a resistor, RC and filter capacitor, CF, at the VC pin
(see Figures 10 and 11) to compensate the loop over the
entire VIN range (to allow for stable pulse skipping for high
VIN-to-VOUT ratios ≥10). A ceramic output capacitor can
still be used with a simple adjustment to the resistor RC for
stable operation. (See Ceramic Capacitors section for
stabilizing LT1766). If additional phase margin is required,
a capacitor, CFB, can be inserted between the output and
FB pin but care must be taken for high output voltage
applications. Sudden shorts to the output can create
unacceptably large negative transients on the FB pin.
For VIN-to-VOUT ratios <10, higher loop bandwidths are
possible by readjusting the frequency compensation com-
ponents at the VC pin.
When checking loop stability, the circuit should be oper-
ated over the applications’s full voltage, current and tem-
perature range. Proper loop compensation may be ob-
tained by emperical methods as described in detail in
Application Notes 19 and 76.
CONVERTER WITH BACKUP OUTPUT REGULATOR
In systems with a primary and backup supply, for ex-
ample, a battery powered device with a wall adapter input,
the output of the LT1766 can be held up by the backup
supply with the LT1766 input disconnected. In this condi-
tion, the SW pin will source current into the VIN pin. If the
SHDN pin is held at ground, only the shut down current of
25
A will be pulled via the SW pin from the second supply.
With the SHDN pin floating, the LT1766 will consume its
quiescent operating current of 1.5mA. The VIN pin will also
source current to any other components connected to the
input line. If this load is greater than 10mA or the input
could be shorted to ground, a series Schottky diode must
be added, as shown in Figure 12. With these safeguards,
the output can be held at voltages up to the VIN absolute
maximum rating.
BUCK CONVERTER WITH ADJUSTABLE SOFT-START
Large capacitive loads or high input voltages can cause
high input currents at start-up. Figure 13 shows a circuit
that limits the dv/dt of the output at start-up, controlling
the capacitor charge rate. The buck converter is a typical
configuration with the addition of R3, R4, CSS and Q1.
As the output starts to rise, Q1 turns on, regulating switch
current via the VC pin to maintain a constant dv/dt at the
output. Output rise time is controlled by the current
through CSS defined by R4 and Q1’s VBE. Once the output
is in regulation, Q1 turns off and the circuit operates
normally. R3 is transient protection for the base of Q1.
5V, 1A
REMOVABLE
INPUT
C2
0.33
F
CF
220pF
R3
54k
D1
10MQ060N
1766 F12
C3
2.2
F
RC
2.2k
CC
0.022
F
D3
10MQ060N
D2
1N4148W
L1
47
H
C1
100
F
10V
ALTERNATE
SUPPLY
R4
25k
R1
15.4k
R2
4.99k
BOOST
VIN
LT1766
SHDN
SYNC
SW
BIAS
FB
VC
GND
+
Figure 12. Dual Source Supply with 25
A Reverse Leakage
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