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参数资料
| 型号： | LT1766HGN#PBF |
| 厂商： | LINEAR TECHNOLOGY CORP |
| 元件分类： | 稳压器 |
| 英文描述： | 3 A SWITCHING REGULATOR, 228 kHz SWITCHING FREQ-MAX, PDSO16 |
| 封装： | 0.150 INCH, LEAD FREE, PLASTIC, SSOP-16 |
| 文件页数： | 8/28页 |
| 文件大小： | 284K |
| 代理商： | LT1766HGN#PBF |
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16
LT1766/LT1766-5
1766fb
BOOST PIN
For most applications, the boost components are a 0.33
F
capacitor and a 1N4148W diode. The anode is typically
connected to the regulated output voltage to generate a
voltage approximately VOUT above VIN to drive the output
stage. However, the output stage discharges the boost
capacitor during the on time of the switch. The output
driver requires at least 3V of headroom throughout this
period to keep the switch fully saturated. If the output
voltage is less than 3.3V, it is recommended that an
alternate boost supply is used. The boost diode can be
connected to the input, although, care must be taken to
prevent the 2
× VIN boost voltage from exceeding the
BOOST pin absolute maximum rating. The additional
voltage across the switch driver also increases power
loss, reducing efficiency. If available, and independent
supply can be used with a local bypass capacitor.
A 0.33
F boost capacitor is recommended for most appli-
cations. Almost any type of film or ceramic capacitor is
suitable, but the ESR should be <1
to ensure it can be
fully recharged during the off time of the switch. The
capacitor value is derived from worst-case conditions of
4700ns on time, 42mA boost current and 0.7V discharge
ripple. The boost capacitor value could be reduced under
less demanding conditions, but this will not improve
circuit operation or efficiency. Under low input voltage and
low load conditions, a higher value capacitor will reduce
discharge ripple and improve start-up operation.
SHUTDOWN FUNCTION AND UNDERVOLTAGE
LOCKOUT
Figure 4 shows how to add undervoltage lockout (UVLO)
to the LT1766. Typically, UVLO is used in situations where
the input supply is
current limited, or has a relatively high
source resistance. A switching regulator draws constant
power from the source, so source current increases as
source voltage drops. This looks like a negative resistance
load to the source and can cause the source to current limit
or latch low under low source voltage conditions. UVLO
prevents the regulator from operating at source voltages
where these problems might occur.
Threshold voltage for lockout is about 2.38V. A 5.5
A bias
current flows
out of the pin at this threshold. The internally
generated current is used to force a default high state on
the shutdown pin if the pin is left open. When low shut-
down current is not an issue, the error due to this current
can be minimized by making RLO 10k or less. If shutdown
current is an issue, RLO can be raised to 100k, but the error
due to initial bias current and changes with temperature
should be considered.
Rk
R
RV
V
VR
A
LO
HI
LO
IN
LO
=
()
=
()
()
10
238
55
to 100k 25k suggested
.
..
VIN = Minimum input voltage
APPLICATIO S I FOR ATIO
WU
UU
–
+
–
+
2.38V
0.4V
GND
VSW
LT1766
INPUT
RFB
L1
C1
RHI
1766 F04
OUTPUT
SHDN
STANDBY
IN
TOTAL
SHUTDOWN
5.5
A
RLO
C2
+
Figure 4. Undervoltage Lockout
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