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参数资料
| 型号： | LT1941EFE#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 20/24页 |
| 文件大小： | 0K |
| 描述： | IC REG MULTI CONFIG TRPL 28TSSOP |
| 标准包装： | 50 |
| 类型： | 降压（降压），升压（升压），反相，Sepic |
| 输出类型： | 可调式 |
| 输出数： | 3 |
| 输出电压： | 1.25 V ~ 40 V |
| 输入电压： | 3.5 V ~ 25 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 1.1MHz |
| 电流 - 输出： | 3A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-SOIC（0.173"，4.40mm 宽）裸露焊盘 |
| 包装： | 管件 |
| 供应商设备封装： | 28-TSSOP 裸露焊盘 |
LT1941
APPLICATIONS INFORMATION
T JMAX A
P DISS =
P 3 = DISS – V 1 ? I 1 2
1 – η
I 3 =
current capability of the third channel can be calculated
from the output currents and voltages of the other chan-
nels, the switching regulator ef?ciency ( η ), the ambient
temperature (T A ), the maximum junction temperature
(T JMAX ) and the thermal resistance from junction to ambi-
ent ( θ JA ) as follows:
– T
θ JA
P
– V 2 ? I
P 3
V 3
Example: LT1941 at V1 = 2.5V, I 1 = 2A, V2 = 3.3V, I 2 =
1A, V3 = 12V, η = 80%, T A = 75°C, T JMAX = 125°C, θ JA =
Note that decreasing θ JA increases the power output
capability. The power output capability of the individual
channels can be calculated from the following:
Channel 1 Output Power (P1) = V1 ? I 1
Channel 2 Output Power (P2) = V2 ? I 2
Channel 3 Output Power (P3) = V3 ? I 3
Total Output Power (P123) = P DISS / η = P1 + P2 + P3
Figure 9 shows power output capability if overall system
ef?ciency ( η ) is 75% and maximum allowable power
dissipation (P DISS ) is either 1W or 2W. For example, if al-
lowable power dissipation is 2W, Channel 3 output power
is 2W and Channel 2 output power is 1W, then Channel 1
output power can be up to 5W.
RELATED LINEAR TECHNOLOGY PUBLICATIONS
P DISS =
25°C/W:
125 ° C – 75 ° C
25 ° C / W
= 2 W
Application notes 19, 35, 44, 76 and 88 contain more
detailed descriptions and design information for buck
regulators and other switching regulators. The LT1375
P 3 =
2 W
1 – 0 . 8
– 2 . 5 V ? 2 A – 3 . 3 V ? 1 A = 1 . 7 W
data sheet has a more extensive discussion of output
ripple, loop compensation, and stability testing. Design
I 3 = = 0 . 141 A
1 .7 W
12 V
Power Output Capability for P DISS = 2W, η = 0.75
6
Notes 100 and 318 show how to generate a dual polarity
output supply using a buck regulator.
Power Output Capability for P DISS = 1W, η = 0.75
3.0
5
CHANNEL 3
2.5
CHANNEL 3
4
3
2
1
OUTPUT POWER (P3)
P3 = 2W
P3 = 4W
P3 = 6W
2.0
1.5
1.0
0.5
OUTPUT POWER (P3)
P3 = 1W
P3 = 2W
P3 = 3W
0
0
1
2 3 4
5
6
0
0
1 2
3
CHANNEL 1 OUTPUT POWER (WATTS)
1941 F09a
CHANNEL 1 OUTPUT POWER (WATTS)
1941 F09b
Figure 9. Power Output Capability of an Individual Channel Depends on the Output Power of the Other Channels
1941fb
20
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