参数资料
型号: LT1943EFE#TRPBF
厂商: Linear Technology
文件页数: 10/20页
文件大小: 0K
描述: IC REG SW QUAD TFT LCD 28-TSSOP
标准包装: 2,000
应用: 转换器,TFT,LCD
输入电压: 4.5 V ~ 22 V
输出数: 4
输出电压: 1.25 V ~ 40 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-SOIC(0.173",4.40mm 宽)裸露焊盘
供应商设备封装: 28-TSSOP 裸露焊盘
包装: 带卷 (TR)
LT1943
OPERATIO
The LT1943 is a highly integrated power supply IC con-
taining four separate switching regulators. All four switch-
ing regulators have their own oscillator with frequency
foldback and use current mode control. Switching regula-
tor 1 consists of a step-down regulator with a switch
current limit of 2.4A. Switching regulator 2 can be config-
ured as a step-up or SEPIC converter and has a 2.6A
switch. Switching regulator 3 consists of a step-up regu-
lator with a 0.35A switch as well as an integrated Schottky
diode. Switching regulator 4 has two feedback pins (FB4
RUN-SS
2V/DIV
V LOGIC
5V/DIV
I L1
1A/DIV
SS-234
2V/DIV
AV DD
20V/DIV
I L2+L3
1A/DIV
PGOOD
and NFB4) and can directly regulate positive or negative
output voltages. The four regulators share common cir-
cuitry including input source, voltage reference, and mas-
20V/DIV
5ms/DIV
(2a)
1943 F03a
ter oscillator. Operation can be best understood by refer-
ring to the Block Diagram as shown in Figure 1.
If the RUN/SS pin is pulled to ground, the LT1943 is shut
down and draws 35 μ A from the input source tied to V IN . An
internal 1.7 μ A current source charges the external soft-
start capacitor, generating a voltage ramp at this pin. If the
RUN/SS pin exceeds 0.6V, the internal bias circuits turn
on, including the internal regulator, reference, and 1.1MHz
master oscillator. The master oscillator generates four
clock signals, one for each of the switching regulators.
Switching regulator 1 will only begin to operate when the
V OFF
10V/DIV
I L4
500mA/DIV
V E3
20V/DIV
I L5
500mA/DIV
V CT
2V/DIV
V ON
50V/DIV
RUN/SS pin reaches 0.8V. Switcher 1 generates V LOGIC ,
5ms/DIV
1943 F03b
which must be tied to the BIAS pin. When BIAS reaches
2.8V, the NPN pulling down on the SS-234 pin turns off,
allowing an internal 1.7 μ A current source to charge the
external capacitor tied to the SS-234 pin. When the voltage
on the SS-234 pin reaches 0.8V, switchers 2, 3 and 4 are
enabled. AV DD and V OFF will then begin rising at a ramp
rate determined by the capacitor tied to the SS-234 pin.
When all the outputs reach 90% of their programmed
voltages, the NPN pulling down on the C T pin will turn off,
and an internal 20 μ A current source will charge the exter-
nal capacitor tied to the C T pin. When the C T pin reaches
1.1V, the output disconnect PNP turns on, connecting
V ON . In the event of any of the four outputs dropping below
10% of their programmed voltage, PanelProtect circuitry
pulls the C T pin to GND, disabling V ON .
A power good comparator monitors AV DD and turns on
(2b)
Figure 2. LT1943 Power-Up Sequence. (Traces From
Both Photos are Synchronized to the Same Trigger)
The output is an open collector transistor that is off when
the output is out of regulation, allowing an external resis-
tor to pull the pin high. This pin can be used with a
P-channel MOSFET that functions as an output disconnect
for AV DD .
The four switchers are current mode regulators. Instead of
directly modulating the duty cycle of the power switch, the
feedback loop controls the peak current in the switch
during each cycle. Compared to voltage mode control,
current mode control improves loop dynamics and pro-
vides cycle-by-cycle current limit.
when the FB2 pin is at or above 90% of its regulated value.
1943fa
10
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