参数资料
型号: LT3431IFE#TRPBF
厂商: Linear Technology
文件页数: 19/28页
文件大小: 0K
描述: IC REG BUCK ADJ 3A 16TSSOP
标准包装: 2,500
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 1.2 V ~ 48 V
输入电压: 5.5 V ~ 60 V
PWM 型: 电流模式
频率 - 开关: 500kHz
电流 - 输出: 3A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 16-TSSOP(0.173",4.40mm)裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 16-TSSOP-EP
LT3431
APPLICATIO S I FOR ATIO
Switch loss:
When estimating ambient, remember the nearby catch
( ) ( V OUT ) + t EFF ( 1 / 2 ) ( I OUT )( V IN )( f )
P DIODE =
P SW =
2
R SW I OUT
V IN
diode and inductor will also be dissipating power:
(V F )(V IN – V OUT )(I LOAD )
V IN
( )
P DIODE =
= 0 . 61 W
( 0 . 15 )( 2 ) ( 5 )
+ ( 101 ? 10 ? 9 )( 1 / 2 )( 2 )( 12 )( 500 ? 10 3 )
( 5 ) ( 2 / 36 )
Boost current loss:
2
V OUT I OUT / 36
P BOOST =
V IN
Quiescent current loss:
P Q = V IN ( 0 . 0015 ) + V OUT ( 0 . 003 )
R SW = Switch resistance ( ≈ 0.15) hot
t EFF = Effective switch current/voltage overlap time
= (t r + t f + t Ir + t If )
t r = (V IN /1.2)ns
t f = (V IN /1.1)ns
t Ir = t If = (I OUT /0.05)ns
f = Switch frequency
Example: with V IN = 12V, V OUT = 5V and I OUT = 2A
2
P SW =
12
= 0 . 25 + 0 . 61 = 0 . 86 W
2
P BOOST = = 0 . 12 W
12
P Q = 12 ( 0 . 0015 ) + 5 ( 0 . 003 ) = 0 . 033 W
Total power dissipation in the IC is given by:
P TOT = P SW + P BOOST + P Q
= 0.86W + 0.12W + 0.03W = 1.01W
Thermal resistance for the LT3431 package is influenced
by the presence of internal or backside planes.
TSSOP (Exposed Pad) Package: With a full plane under the
TSSOP package, thermal resistance (θ JA ) will be about
45 ° C/W.
To calculate die temperature, use the proper thermal
resistance number for the desired package and add in
worst-case ambient temperature:
T J = T A + ( θ JA ? P TOT )
V F = Forward voltage of diode (assume 0.52V at 2A)
(0.52)(12 – 5)(2)
12
Notice that the catch diode’s forward voltage contributes
a significant loss in the overall system efficiency. A larger,
lower V F diode can improve efficiency by several percent.
P INDUCTOR = (I LOAD ) 2 (R IND )
R IND = Inductor DC resistance (assume 0.1 ? )
P INDUCTOR (2) 2 (0.1) = 0.4W
Typical thermal resistance of the board is 5 ° C/W. Taking
the catch diode and inductor power dissipation into ac-
count and using the example calculations for LT3431
dissipation, the LT3431 die temperature will be estimated
as:
T J = T A + ( θ JA ? P TOT ) + [5 ? (P DIODE + P INDUCTOR )]
With the TSSOP package ( θ JA = 45 ° C/W), at an ambient
temperature of 50 ° C:
T J = 50 + (45 ? 1.01) + (5 ? 1.01) = 101 ° C
Die temperature can peak for certain combinations of V IN ,
V OUT and load current. While higher V IN gives greater
switch AC losses, quiescent and catch diode losses, a
lower V IN may generate greater losses due to switch DC
losses. In general, the maximum and minimum V IN levels
should be checked with maximum typical load current for
calculation of the LT3431 die temperature. If a more
accurate die temperature is required, a measurement of
the SYNC pin resistance (to GND) can be used. The SYNC
pin resistance can be measured by forcing a voltage no
greater than 0.5V at the pin and monitoring the pin current
over temperature in an oven. This should be done with
minimal device power (low V IN and no switching
(V C = 0V)) in order to calibrate SYNC pin resistance with
ambient (oven) temperature.
sn3431 3431fs
19
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