参数资料
| 型号： | LT3431IFE#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 22/28页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK ADJ 3A 16TSSOP |
| 标准包装： | 2,500 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 1.2 V ~ 48 V |
| 输入电压： | 5.5 V ~ 60 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 500kHz |
| 电流 - 输出： | 3A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-TSSOP（0.173"，4.40mm）裸露焊盘 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 16-TSSOP-EP |
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LT3431
APPLICATIO S I FOR ATIO
tantalum output capacitor with a ceramic output capacitor
because of its very low ESR. The zero provided by the
tantalum output capacitor must now be reinserted back
into the loop. Alternatively there may be cases where, even
with the tantalum output capacitor, an additional zero is
required in the loop to increase phase margin for improved
transient response.
A zero can be added into the loop by placing a resistor, R C,
at the V C pin in series with the compensation capacitor, C C
or by placing a capacitor, C FB , between the output and the
FB pin.
a capacitor, C FB , can be inserted between the output and
FB pin but care must be taken for high output voltage
applications. Sudden shorts to the output can create
unacceptably large negative transients on the FB pin.
For V IN -to-V OUT ratios <4, higher loop bandwidths are
possible by readjusting the frequency compensation com-
ponents at the V C pin.
When checking loop stability, the circuit should be oper-
ated over the application’s full voltage, current and
temperature range. Proper loop compensation may be
obtained by empirical methods as described in detail in
80
60
40
GAIN
180
150
120
Application Notes 19 and 76.
CONVERTER WITH BACKUP OUTPUT REGULATOR
20
0
–20
PHASE
90
60
30
In systems with a primary and backup supply, for ex-
ample, a battery powered device with a wall adapter input,
the output of the LT3431 can be held up by the backup
supply with the LT3431 input disconnected. In this condi-
–40
10 100 1k 10k 100k
FREQUENCY (Hz)
V IN = 12V R C = 3.3k
V OUT = 5V C C = 22nF
I LOAD = 1A C F = 220pF
C OUT = 100 μ F, 10V, 0.1 ?
0
1M
3431 F11
tion, the SW pin will source current into the V IN pin. If the
SHDN pin is held at ground, only the shut down current of
30 μ A will be pulled via the SW pin from the second supply.
With the SHDN pin floating, the LT3431 will consume its
Figure 11. Overall Loop Response
When using R C , the maximum value has two limitations.
First, the combination of output capacitor ESR and R C may
stop the loop rolling off altogether. Second, if the loop gain
is not rolled sufficiently at the switching frequency, output
ripple will perturb the V C pin enough to cause unstable
quiescent operating current of 1.5mA. The V IN pin will also
source current to any other components connected to the
input line. If this load is greater than 10mA or the input
could be shorted to ground, a series Schottky diode must
be added, as shown in Figure 12. With these safeguards,
the output can be held at voltages up to the V IN absolute
maximum rating.
duty cycle switching similar to subharmonic oscillation. If
needed, an additional capacitor (C F ) can be added across
the R C /C C network from V C pin to ground to further
suppress V C ripple voltage.
With a tantalum output capacitor, the LT3431 already
REMOVABLE
INPUT
D3
30BQ060
54k
V IN
SHDN
BOOST
LT3431
SW
BIAS
D2
MMSD914TI
C2
0.22 μ F
10 μ H
R1
15.4k
5V, 2A ALTERNATE
SUPPLY
includes a resistor, R C and filter capacitor, C F , at the V C pin
(see Figures 10 and 11) to compensate the loop over the
entire V IN range (to allow for stable pulse skipping for high
V IN -to-V OUT ratios ≥ 4). A ceramic output capacitor can still
25k
C3
4.7 μ F
SYNC
GND
R C
3.3k
C C
0.022 μ F
FB
V C
C F
220pF
D1
30BQ060
R2
4.99k
+
C1
100 μ F
10V
3431 F12
be used with a simple adjustment to the resistor R C for
stable operation. (See Ceramic Capacitors section for
stabilizing LT3431). If additional phase margin is required,
Figure 12. Dual Source Supply with 25 μ A Reverse Leakage
sn3431 3431fs
22
相关PDF资料 |
PDF描述 |
|---|---|
| LT3433IFE#TRPBF | IC REG BUCK BST ADJ 0.5A 16TSSOP |
| LT3434IFE#TRPBF | IC REG BUCK ADJ 3A 16TSSOP |
| LT3435IFE#TRPBF | IC REG BUCK ADJ 3A 16TSSOP |
| LT3436EFE#TRPBF | IC REG BOOST ADJ 3A 16TSSOP |
| LT3437EDD#PBF | IC REG BUCK ADJ 0.5A 10DFN |
相关代理商/技术参数 |
参数描述 |
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| LT3433 | 制造商:LINER 制造商全称:Linear Technology 功能描述:High Voltage Step-Up/Step-Down DC/DC Converter |
| LT3433_1 | 制造商:LINER 制造商全称:Linear Technology 功能描述:High Voltage Step-Up/Step-Down DC/DC Converter |
| LT3433EFE | 功能描述:IC REG BUCK BST ADJ 0.5A 16TSSOP RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:2,500 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:1.2V，1.5V，1.8V，2.5V 输入电压:2.7 V ~ 20 V PWM 型:- 频率 - 开关:- 电流 - 输出:50mA 同步整流器:是 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:10-TFSOP，10-MSOP（0.118"，3.00mm 宽）裸露焊盘 包装:带卷 (TR) 供应商设备封装:10-MSOP 裸露焊盘 |
| LT3433EFE#PBF | 功能描述:IC REG BUCK BST ADJ 0.5A 16TSSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:250 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:1.2V 输入电压:2.05 V ~ 6 V PWM 型:电压模式 频率 - 开关:2MHz 电流 - 输出:500mA 同步整流器:是 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:6-UFDFN 包装:带卷 (TR) 供应商设备封装:6-SON（1.45x1） 产品目录页面:1032 (CN2011-ZH PDF) 其它名称:296-25628-2 |
| LT3433EFE#TR | 功能描述:IC REG BUCK BST ADJ 0.5A 16TSSOP RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:2,500 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:1.2V，1.5V，1.8V，2.5V 输入电压:2.7 V ~ 20 V PWM 型:- 频率 - 开关:- 电流 - 输出:50mA 同步整流器:是 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:10-TFSOP，10-MSOP（0.118"，3.00mm 宽）裸露焊盘 包装:带卷 (TR) 供应商设备封装:10-MSOP 裸露焊盘 |
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