参数资料
型号: LT3487EDD#PBF
厂商: Linear Technology
文件页数: 12/16页
文件大小: 0K
描述: IC REG BOOST INV ADJ 10DFN
标准包装: 121
类型: 升压(升压),反相
输出类型: 可调式
输出数: 1
输出电压: 1.23 V ~ 28 V
输入电压: 2.3 V ~ 16 V
PWM 型: 电流模式
频率 - 开关: 2MHz
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 10-WFDFN 裸露焊盘
包装: 管件
供应商设备封装: 10-DFN(3x3)
产品目录页面: 1331 (CN2011-ZH PDF)
LT3487
APPLICATIO S I FOR ATIO
and the inductors directly from the battery for higher ef-
?ciency. When the part goes into shutdown, the output
load is isolated from the 12V source as soon as the CAP
node falls to below V BAT plus 1.2V (13.2V in this case).
The V BAT pin is also useful in a system using a 2V supply
(such as a 2-cell alkaline battery), below the operating
range of the LT3487. A boost converter designed for low
voltage operation can provide 3.3V for the LT3487 V IN pin,
while the inductors and V BAT can still be powered from the
2V supply. In shutdown, the 3.3V supply will turn off, but
the output disconnect will still decouple the output load
as soon as CAP falls below 3.2V .
Board Layout Consideration
As with all switching regulators, careful attention must be
paid to the PCB board layout and component placement.
To maximize ef?ciency, switch rise and fall times are made
as short as possible. To prevent electromagnetic interfer-
ence (EMI) problems, proper layout of the high frequency
switching path is essential. The voltage signals of the
SWP and SWN pins have rise and fall times of a few ns.
Minimize the length and area of all traces connected to
the SWP and SWN pins and always use a ground plane
under the switching regulator to minimize interplane
coupling. Recommended component placement is shown
in Figure 6.
V BAT
CAP
FBP
L1
L3
L1
U1
V NEG
V POS
R2
C7
M1
3487 F06
V IN
RUN
Figure 6. Recommended Component Placement
3487f
12
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