参数资料
型号: LT3581EMSE#PBF
厂商: Linear Technology
文件页数: 19/36页
文件大小: 0K
描述: IC REG MULTI CONFIG ADJ 16MSOP
标准包装: 37
类型: 升压(升压),反相,回扫,Sepic
输出类型: 可调式
输出数: 1
输出电压: 1.22 V ~ 42 V
输入电压: 2.5 V ~ 22 V
PWM 型: 电流模式
频率 - 开关: 200kHz ~ 2.5MHz
电流 - 输出: 3.3A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 16-TFSOP(0.118",3.00mm 宽)裸露焊盘
包装: 管件
供应商设备封装: 16-MSOP,裸露焊盘
LT3581
APPLICATIONS INFORMATION
SYNC
Clock Synchronization
The operating frequency of the LT3581 can be set by an
external source by simply providing a digital clock signal
into the SYNC pin (R T resistor still required). The LT3581
will revert to its internal free-running oscillator clock (set
by the R T resistor) when the SYNC pin is driven below
0.4V for a few free-running clock periods.
1.5μH
SW1 SW2
GATE FB
V IN CLKOUT
LT3581
SHDN SLAVE V C
RT GND
2.2μF
FAULT SS
4.7μF
0.1μF
10k
2.2nF
V OUT
–12V
450mA
143k
100pF
Driving SYNC high for an extended period of time effec-
tively stops the operating clock and prevents latch SR1
from becoming set (see Block Diagram). As a result, the
switching operation of the LT3581 will stop and the CLKOUT
pin will be held at ground.
V IN
5V
6.8μF
10k
43.2k
1.5μH
6.8μF
GATE
SW1 SW2
CLKOUT
4.7μF
V OUT
12V
830mA
130k
100k
FAULT V C
ENABLE
0.1μF
56pF
SYNC
The duty cycle of the SYNC signal must be between 20%
and 80% for proper operation. Also, the frequency of the
SYNC signal must meet the following two criteria:
(1) SYNC may not toggle outside the frequency range of
200kHz to 2.5MHz unless it is stopped low (below
0.4V) to enable the free-running oscillator.
(2) The SYNC frequency can always be higher than the
free-running oscillator frequency (as set by the R T
resistor), f OSC , but should not be less than 25%
below f OSC .
CLOCK SYNCHRONIZATION OF ADDITIONAL
REGULATORS
The CLKOUT pin of the LT3581 can be used to synchronize
one or more other compatible switching regulator ICs as
shown in Figure 11.
The frequency of the master LT3581 is set by the external
R T resistor. The SYNC pin of the slave LT3581 is driven
by the CLKOUT pin of the master LT3581. Note that the
RT pin of the slave LT3581 must have a resistor tied to
ground. It takes a few clock cycles for the CLKOUT signal
to begin oscillating, and it’s preferable for all LT3581s to
have the same internal free-running frequency. Therefore,
in general, use the same value R T resistor for all of the
synchronized LT3581s.
V IN LT3581 FB
MASTER
10.5k
SHDN SS
RT GND 1nF
43.2k
3581 F11
Figure 11. A Single Inductor Inverting Topology Is Synchronized
with a Boost Regulator to Generate –12V and 12V Outputs. The
External PMOS Helps Disconnect the Input from the Power Paths
During Fault Events
Also, the FAULT pins can be tied together so that a fault
condition from one LT3581 causes all of the LT3581s to
enter fault, until the fault condition disappears.
CHARGE PUMP AIDED REGULATORS
Designing charge pumps with the LT3581 can offer ef-
ficient solutions with fewer components than traditional
circuits because of the master/slave switch configuration
on the IC. Although the slave switch, SW2, operates in
phase with the master switch, SW1, it is only the current
through the master switch (SW1) that is sensed by the
current comparator (A4 in Block Diagram) as part of the
current feedback loop. This method of operation by the
master/slave switches can offer the following benefits to
charge pump designs:
3581fa
For more information www.linear.com/LT3581
19
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