参数资料
型号: LT3751IUFD#TRPBF
厂商: LINEAR TECHNOLOGY CORP
元件分类: 电源管理
英文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC20
封装: 4 X 5 MM, LEAD FREE, PLASTIC, QFN-20
文件页数: 33/34页
文件大小: 403K
代理商: LT3751IUFD#TRPBF
LT3751
8
3751fb
PIN FUNCTIONS
DONE (Pin 7/ Pin 5): Open Collector Indication Pin. When
the target output voltage (charge mode) is reached or the
FAULT pin goes low, a transistor turns on. This pin needs
a proper pull-up resistor or current source.
CHARGE (Pin 8/Pin 6): Charge Pin. Initiates a new charge
cycle (charge mode) or enables the part (regulation mode)
when driven higher than 1.5V. Bring this pin below 0.3V
to discontinue charging and put the part into shutdown.
Turn-on ramp rates should be between 10ns to 10ms.
CHARGE pin should not be directly ramped with VCC or
LT3751 may not properly initialize.
CLAMP (Pin 9/Pin 7): Internal Clamp Voltage Selection
Pin. Tie this pin to VCC to activate the internal 5.6V gate
driver clamp. Tie this pin to ground to activate the internal
10.5V gate driver clamp.
FB (Pin 10/Pin 8): Feedback Regulation Pin. Use this pin
to achieve low noise voltage regulation. FB is internally
regulated to 1.22V when a resistive divider is tied from
this pin to the output. FB pin should not oat. Tie FB pin
to either a resistor divider or ground.
CSN (Pin 11/Pin 9): Negative Current Sense Pin. Senses
external NMOS source current. Connect to local RSENSE
ground connection for proper Kelvin sensing. The current
limit is set by 106mV/RSENSE.
CSP (Pin 12/Pin 10): Positive Current Sense Pin. Senses
NMOS source current. Connect the NMOS source terminal
and the current sense resistor to this pin. The current
limit is xed at 106mV/RSENSE in charge mode. The cur-
rent limit can be reduced to a minimum 11mV/RSENSE in
regulation mode.
VCC (Pin 13/Pin 11): Input Supply Pin. Must be locally
bypassed with high grade (X5R or better) ceramic capacitor.
The minimum operating voltage for VCC is 4.75V.
LVGATE (Pin 14/Pin 12): Low Voltage Gate Pin. Connect
the NMOS gate terminal to this pin when operating VCC
below 8V. The internal gate driver will drive the voltage to
the VCC rail. When operating VCC higher than 8V, tie this
pin directly to VCC.
HVGATE (Pin 15/Pin 13): High Voltage Gate Pin. Connect
NMOS gate terminal to this pin for all VCC operating volt-
ages. Internal gate driver will drive the voltage to within
VCC – 2V during each switch cycle.
RBG (Pin 16/Pin 14): Bias Generation Pin. Generates a bias
current set by 0.98V/RBG. Select RBG to achieve desired
resistance for RDCM, RVOUT, and RVTRANS.
NC (Pins 17, 19/Pins 15, 18): No Connection.
RVOUT (Pin 18/Pin 16): Output Voltage Sense Pin. Devel-
ops a current proportional to the output capacitor volt-
age. Connect a resistor between this pin and the drain of
NMOS such that:
V
OUT = 0.98 N
RV
OUT
R
BG
V
DIODE
when RVOUT is set equal to RVTRANS, otherwise:
V
OUT = N 0.98
RV
OUT
R
BG
+ V
TRANS
RV
OUT
RV
TRANS
1
V
DIODE
where VDIODE = forward voltage drop of diode D1 (refer
to the Block Diagram).
RDCM (Pin 20/Pin 17): Discontinuous Mode Sense Pin.
Senses when the external NMOS drain is equal to 20μA
RDCM + VTRANS and initiates the next switch cycle. Place
a resistor equal to 0.45 times the resistor on the RVTRANS
pin between this pin and VDRAIN.
GND (Pin 21/Pin 21): Ground. Tie directly to local ground
plane.
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