参数资料
| 型号： | LTC3412IFE#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 11/20页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 16TSSOP |
| 标准包装： | 2,500 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.8 V ~ 5 V |
| 输入电压： | 2.63 V ~ 5.5 V |
| PWM 型： | 电流模式，混合 |
| 频率 - 开关： | 950kHz |
| 电流 - 输出： | 2.5A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-TSSOP（0.173"，4.40mm）裸露焊盘 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 16-TSSOP-EP |
LTC3412
APPLICATIO S I FOR ATIO
the power is supplied by a wall adapter through long wires,
a load step at the output can induce ringing at the input,
V IN . At best, this ringing can couple to the output and be
mistaken as loop instability. At worst, a sudden inrush of
current through the long wires can potentially cause a
voltage spike at V IN large enough to damage the part.
Output Voltage Programming
The output voltage is set by an external resistive divider
according to the following equation:
current to remain equal to I BURST regardless of further
reductions in the load current. Since the average inductor
current is greater than the output load current, the voltage
on the I TH pin will decrease. When the I TH voltage drops to
150mV, sleep mode is enabled in which both power
MOSFETs are shut off along with most of the circuitry to
minimize power consumption. All circuitry is turned back
on and the power MOSFETs begin switching again when
the output voltage drops out of regulation. The value for
I BURST is determined by the desired amount of output
voltage ripple. As the value of I BURST increases, the sleep
V OUT = 0 . 8 V ? 1 +
R 1 ?
?
?
R 2 ?
?
period between pulses and the output voltage ripple in-
crease. The burst clamp voltage, V BURST , can be set by a
resistor divider from the V FB pin to the SGND pin as shown
The resistive divider allows the V FB pin to sense a fraction
of the output voltage as shown in Figure 2.
V OUT
R2
V FB
in Figure 1.
Pulse skipping, which is a compromise between low out-
put voltage ripple and efficiency, can be implemented by
connecting the SYNC/MODE pin to ground. This sets I BURST
to 0A. In this condition, the peak inductor current is limited
by the minimum on-time of the current comparator, and
LTC3412
R1
the lowest output voltage ripple is achieved while still op-
I BURST = ( V BURST ? 0 . 2 V ) ?
? 0 . 8 V ?
SGND
3412 F02
Figure 2. Setting the Output Voltage
Burst Clamp Programming
If the voltage on the SYNC/MODE pin is less than V IN by 1V,
Burst Mode operation is enabled. During Burst Mode
operation, the voltage on the SYNC/MODE pin determines
the burst clamp level which sets the minimum peak
inductor current, I BURST , for each switching cycle accord-
ing to the following equation:
? 3 . 75 A ?
?
V BURST is the voltage on the SYNC/MODE pin. I BURST can
be programmed in the range of 0A to 3.75A. For values of
V BURST greater than 1V, I BURST is set at 3.75A. For values
of V BURST less than 0.2V, I BURST is set at 0A. As the output
load current drops, the peak inductor current decreases to
keep the output voltage in regulation. When the output
load current demands a peak inductor current that is less
than I BURST , the burst clamp will force the peak inductor
erating discontinuously. During very light output loads,
pulse skipping allows only a few switching cycles to be
skipped while maintaining the output voltage in regulation.
Frequency Synchronization
The LTC3412’s internal oscillator can be synchronized to
an external clock signal. During synchronization, the top
MOSFET turn-on is locked to the falling edge of the
external frequency source. The synchronization frequency
range is 300kHz to 4MHz. Synchronization only occurs if
the external frequency is greater than the frequency set by
the external resistor. Because slope compensation is
generated by the oscillator’s RC circuit, the external fre-
quency should be set 25% higher than the frequency set
by the external resistor to ensure that adequate slope
compensation is present.
Soft-Start
The RUN/SS pin provides a means to shut down the
LTC3412 as well as a timer for soft-start. Pulling the
RUN/SS pin below 0.5V places the LTC3412 in a low
quiescent current shutdown state (I Q < 1 μ A).
3412fb
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相关代理商/技术参数 |
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| LTC3413 | 制造商:LINER 制造商全称:Linear Technology 功能描述:3A, 2MHz Monolithic Synchronous Regulator for DDR/QDR Memory Termination |
| LTC3413EFE | 功能描述:IC REG BUCK SYNC ADJ 3A 16TSSOP RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 设计资源:Design Support Tool 标准包装:1 系列:- 类型:升压（升压） 输出类型:固定 输出数:1 输出电压:3V 输入电压:0.75 V ~ 2 V PWM 型:- 频率 - 开关:- 电流 - 输出:100mA 同步整流器:是 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SOT-23-5 细型，TSOT-23-5 包装:剪切带 (CT) 供应商设备封装:TSOT-23-5 其它名称:AS1323-BTTT-30CT |
| LTC3413EFE#PBF | 功能描述:IC REG BUCK SYNC ADJ 3A 16TSSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:250 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:1.2V 输入电压:2.05 V ~ 6 V PWM 型:电压模式 频率 - 开关:2MHz 电流 - 输出:500mA 同步整流器:是 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:6-UFDFN 包装:带卷 (TR) 供应商设备封装:6-SON（1.45x1） 产品目录页面:1032 (CN2011-ZH PDF) 其它名称:296-25628-2 |
| LTC3413EFE#TR | 功能描述:IC REG BUCK SYNC ADJ 3A 16TSSOP RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 设计资源:Design Support Tool 标准包装:1 系列:- 类型:升压（升压） 输出类型:固定 输出数:1 输出电压:3V 输入电压:0.75 V ~ 2 V PWM 型:- 频率 - 开关:- 电流 - 输出:100mA 同步整流器:是 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SOT-23-5 细型，TSOT-23-5 包装:剪切带 (CT) 供应商设备封装:TSOT-23-5 其它名称:AS1323-BTTT-30CT |
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