参数资料
| 型号： | LTC3412IFE#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 12/20页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 16TSSOP |
| 标准包装： | 2,500 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.8 V ~ 5 V |
| 输入电压： | 2.63 V ~ 5.5 V |
| PWM 型： | 电流模式，混合 |
| 频率 - 开关： | 950kHz |
| 电流 - 输出： | 2.5A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-TSSOP（0.173"，4.40mm）裸露焊盘 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 16-TSSOP-EP |
LTC3412
APPLICATIO S I FOR ATIO
? ( Seconds )
t SS = R SS C SS ln ?
The LTC3412 contains an internal soft-start clamp that
gradually raises the clamp on I TH after the RUN/SS pin is
pulled above 2V. The full current range becomes available
on I TH after 1024 switching cycles. If a longer soft-start
period is desired, the clamp on I TH can be set externally
with a resistor and capacitor on the RUN/SS pin as shown
in Figure 1. The soft-start duration can be calculated by
using the following formula:
? V IN ?
? V IN ? 1 . 8 V ?
Efficiency Considerations
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It is
often useful to analyze individual losses to determine what
is limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percentage
of input power.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of the
losses: V IN quiescent current and I 2 R losses.
The V IN quiescent current loss dominates the efficiency
loss at very low load currents whereas the I 2 R loss
dominates the efficiency loss at medium to high load
currents. In a typical efficiency plot, the efficiency curve at
very low load currents can be misleading since the actual
power lost is of no consequence.
1. The V IN quiescent current is due to two components:
the DC bias current as given in the electrical characteristics
and the internal main switch and synchronous switch gate
charge currents. The gate charge current results from
switching the gate capacitance of the internal power
MOSFET switches. Each time the gate is switched from
high to low to high again, a packet of charge dQ moves
from V IN to ground. The resulting dQ/dt is the current out
of V IN that is typically larger than the DC bias current. In
continuous mode, I GATECHG =f(Q T + Q B ) where Q T and Q B
are the gate charges of the internal top and bottom
switches. Both the DC bias and gate charge losses are
proportional to V IN and thus their effects will be more
pronounced at higher supply voltages.
2. I 2 R losses are calculated from the resistances of the
internal switches, R SW and external inductor R L . In con-
tinuous mode the average output current flowing through
inductor L is “chopped” between the main switch and the
synchronous switch. Thus, the series resistance looking
into the SW pin is a function of both top and bottom
MOSFET R DS(ON) and the duty cycle (DC) as follows:
R SW = (R DS(ON)TOP )(DC) + (R DS(ON)BOT )(1 – DC)
The R DS(ON) for both the top and bottom MOSFETs can be
obtained from the Typical Performance Characteristics
curves. Thus, to obtain I 2 R losses, simply add R SW to R L
and multiply the result by the square of the average output
current.
Other losses including C IN and C OUT ESR dissipative
losses and inductor core losses generally account for less
than 2% of the total loss.
Thermal Considerations
In most applications, the LTC3412 does not dissipate
much heat due to its high efficiency. But, in applications
where the LTC3412 is running at high ambient tempera-
ture with low supply voltage and high duty cycles, such as
in dropout, the heat dissipated may exceed the maximum
junction temperature of the part. If the junction tempera-
ture reaches approximately 150 ° C, both power switches
will be turned off and the SW node will become high
impedance.
To avoid the LTC3412 from exceeding the maximum
junction temperature, the user will need to do some
thermal analysis. The goal of the thermal analysis is to
determine whether the power dissipated exceeds the
maximum junction temperature of the part. The tempera-
ture rise is given by:
T R = (P D )( θ JA )
where P D is the power dissipated by the regulator and θ JA
is the thermal resistance from the junction of the die to the
ambient temperature.
3412fb
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相关代理商/技术参数 |
参数描述 |
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| LTC3413 | 制造商:LINER 制造商全称:Linear Technology 功能描述:3A, 2MHz Monolithic Synchronous Regulator for DDR/QDR Memory Termination |
| LTC3413EFE | 功能描述:IC REG BUCK SYNC ADJ 3A 16TSSOP RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 设计资源:Design Support Tool 标准包装:1 系列:- 类型:升压（升压） 输出类型:固定 输出数:1 输出电压:3V 输入电压:0.75 V ~ 2 V PWM 型:- 频率 - 开关:- 电流 - 输出:100mA 同步整流器:是 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SOT-23-5 细型，TSOT-23-5 包装:剪切带 (CT) 供应商设备封装:TSOT-23-5 其它名称:AS1323-BTTT-30CT |
| LTC3413EFE#PBF | 功能描述:IC REG BUCK SYNC ADJ 3A 16TSSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:250 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:1.2V 输入电压:2.05 V ~ 6 V PWM 型:电压模式 频率 - 开关:2MHz 电流 - 输出:500mA 同步整流器:是 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:6-UFDFN 包装:带卷 (TR) 供应商设备封装:6-SON（1.45x1） 产品目录页面:1032 (CN2011-ZH PDF) 其它名称:296-25628-2 |
| LTC3413EFE#TR | 功能描述:IC REG BUCK SYNC ADJ 3A 16TSSOP RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 设计资源:Design Support Tool 标准包装:1 系列:- 类型:升压（升压） 输出类型:固定 输出数:1 输出电压:3V 输入电压:0.75 V ~ 2 V PWM 型:- 频率 - 开关:- 电流 - 输出:100mA 同步整流器:是 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SOT-23-5 细型，TSOT-23-5 包装:剪切带 (CT) 供应商设备封装:TSOT-23-5 其它名称:AS1323-BTTT-30CT |
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