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| 型号： | LTC3447EDD#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 12/16页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 0.6A 10DFN |
| 标准包装： | 2,500 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.69 V ~ 2.05 V |
| 输入电压： | 2.5 V ~ 5.5 V |
| PWM 型： | 电流模式，混合 |
| 频率 - 开关： | 1MHz |
| 电流 - 输出： | 600mA |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-WFDFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 10-DFN（3x3） |
LTC3447
APPLICATIO S I FOR ATIO
[ V OUT ( V IN – V OUT ) ] 1 / 2
C IN and C OUT Selection
In continuous mode, the source current of the top MOSFET
is a square wave of duty cycle V OUT /V IN . To prevent large
voltage transients, a low ESR input capacitor sized for
the maximum RMS current must be used. The maximum
RMS capacitor current is given by:
C IN required I RMS ? I OMAX
V IN (2)
This formula has a maximum at V IN = 2V OUT , where
I RMS = I OUT /2. This simple worst-case condition is com-
monly used for design because even signi?cant devia-
tions do not offer much relief. Note that the capacitor
manufacturer’s ripple current ratings are often based
on 2000 hours of life. This makes it advisable to further
derate the capacitor, or choose a capacitor rated at a
higher temperature than required. Always consult the
manufacturer if there is any question.
The selection of C OUT is driven by the required effective
series resistance (ESR). Typically, once the ESR require-
ment for C OUT has been met, the RMS current rating
generally far exceeds the I RIPPLE(P-P) requirement. The
output ripple Δ V OUT is determined by:
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them
ideal for switching regulator applications. Because the
LTC3447’s control loop does not depend on the output
capacitor’s ESR for stable operation, ceramic capacitors
can be used freely to achieve very low output ripple and
small circuit size.
However, care must be taken when ceramic capacitors
are used at the input and the output. When a ceramic
capacitor is used at the input and the power is supplied
by a wall adapter through long wires, a load step at the
output can induce ringing at the input, V IN . At best, this
ringing can couple to the output and be mistaken as loop
instability. At worst, a sudden inrush of current through
the long wires can potentially cause a voltage spike at V IN ,
large enough to damage the part.
When choosing the input and output ceramic capacitors,
choose the X5R or X7R dielectric formulations. These
dielectrics have the best temperature and voltage charac-
teristics of all the ceramics for a given value and size.
Output Voltage Programming
The LTC3447 has an internal resistor divider network tied
? V OUT ? ? I L ? ESR +
8 fC OUT ?
?
?
1 ?
?
(3)
to the OUT pin. The output voltage is controlled by a DAC
(6-bit register) whose setting is programmed via the I 2 C
interface. The DAC controls the V OUT range of 0.69V to
2.05V in 21.6mV steps. The default value for V OUT is 1.38V
where f = operating frequency, C OUT = output capacitance
and Δ I L = ripple current in the inductor. For a ?xed output
voltage, the output ripple is highest at maximum input
voltage since Δ I L increases with input voltage.
Aluminum electrolytic and dry tantalum capacitors are both
available in surface mount con?gurations. In the case of
tantalum, it is critical that the capacitors are surge tested
for use in switching power supplies. An excellent choice is
the AVX TPS series of surface mount tantalum. These are
specially constructed and tested for low ESR so they give
the lowest ESR for a given volume. Other capacitor types
include Sanyo POSCAP, Kemet T510 and T495 series, and
Sprague 593D and 595D series. Consult the manufacturer
for other speci?c recommendations.
Using Ceramic Input and Output Capacitors
Higher values, lower cost ceramic capacitors are now
and is reset to this value whenever V IN comes up.
Ef?ciency Considerations
The ef?ciency of a switching regulator is equal to the output
power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
limiting the ef?ciency and which change would produce
the most improvement. Ef?ciency can be expressed as:
Ef?ciency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of
the losses in LTC3447 circuits: V IN quiescent current and
I 2 R losses. The V IN quiescent current loss dominates the
ef?ciency loss at very low load currents whereas the I 2 R
3447f
12
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