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| 型号： | LTC3536EDD#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 19/28页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK BOOST SYNC ADJ 12DFN |
| 标准包装： | 121 |
| 类型： | 降压（降压），升压（升压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 1.8 V ~ 5.5 V |
| 输入电压： | 1.8 V ~ 5.5 V |
| PWM 型： | 电压模式，混合 |
| 频率 - 开关： | 300kHz ~ 2MHz |
| 电流 - 输出： | 1A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-WFDFN 裸露焊盘 |
| 包装： | 管件 |
| 供应商设备封装： | 10-DFN（3x3） |
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LTC3536
APPLICATIONS INFORMATION
negligible (for 40kHz is around –5.7°). However, for loops
with higher crossover frequencies this additional phase
lag should be taken into account when designing the
compensation network.
Loop Compensation Example
This section provides an example illustrating the design of
a compensation network for a typical LTC3536 application
circuit. In this example a 3.3V regulated output voltage is
generated with the ability to supply 300mA load from an
input power source ranging from 1.8V to 5.5V. To optimize
efficiency 1MHz switching frequency has been chosen. In
this application the maximum inductor current ripple will
occur at the highest input voltage. An inductor value of
4.7μH has been chosen to limit the worst-case inductor
current ripple. A low ESR output capacitor with a value
of 22μF is specified to yield a worst-case output voltage
ripple of approximately 10mV (occurring at the worst-case
step-up ratio and maximum load current). In summary, the
key power stage specifications for this LTC3536 example
application are given below:
f = 1MHz
V IN = 1.8V to 5.5V
V OUT = 3.3V at 300mA
C OUT = 22μF,
R C = 10mΩ
L = 4.7μH,
R L = 60mΩ
at which the phase of the buck-boost converter reaches
–180°. It is generally difficult to determine this frequency
analytically, because it is significantly impacted by the Q
factor of the resonance in the power stage. As a result,
it is best determined from a Bode plot of the buck-boost
converter as shown in Figure 10. This Bode plot is for the
LTC3536 buck-boost converter using the previously speci-
fied power stage parameters and was generated from the
small signal model equations using LTSpice ? software.
In this case, the phase reaches –180° at 37.8kHz making
f C = 37.8kHz the target crossover frequency for the com-
pensated loop. From the Bode plot of Figure 9 the gain of
the power stage at the target crossover frequency is –2dB.
At this point in the design process, there are three con-
straints that have been established for the compensation
network. It must have +2dB gain at f C = 37.8kHz, a peak
phase boost of 60° and the phase boost must be centered
at f C = 37.8kHz.
An analytical approach can be used to design a compensa-
tion network with the desired phase boost, center frequency
and gain. In general, this procedure can be cumbersome
due to the large number of degrees of freedom in a Type?III
compensation network. However the design process can
be simplified by assuming that both compensation zeros
V O /V C
30 0
24 –20
With the power stage parameters specified, the compen-
sation network can be designed. A reasonable approach
is to design the compensation network at this worst-case
corner and then verify that sufficient phase margin exists
across all other operating conditions. In this example ap-
plication, at V IN = 1.8V and the full 300mA load current,
the right-half plane zero will be located at 100kHz and this
will be a dominant factor in determining the bandwidth of
the control loop.
18
12
6
0
–6
–12
–18
–24
PHASE
GAIN
–40
–60
–80
–100
–120
–140
–160
–180
The first step in designing the compensation network
is to determine the target crossover frequency for the
compensated loop. This example will be designed for a
60° phase margin to ensure adequate performance over
parametric variations and varying operating conditions. As
a result, the target crossover frequency, f C , will be the point
–30 –200
–36 –220
–42 –240
1 10 100 1k 10k 100k 1M 10M 100M
FREQUENCY (Hz) 3536 F10
Figure 10. Converter Bode Plot, V IN = 1.8V, I LOAD = 300mA
3536fa
19
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参数描述 |
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| LTC3536EMSE#PBF | 功能描述:IC REG BUCK BST SYNC ADJ 12MSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:250 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:1.2V 输入电压:2.05 V ~ 6 V PWM 型:电压模式 频率 - 开关:2MHz 电流 - 输出:500mA 同步整流器:是 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:6-UFDFN 包装:带卷 (TR) 供应商设备封装:6-SON（1.45x1） 产品目录页面:1032 (CN2011-ZH PDF) 其它名称:296-25628-2 |
| LTC3536EMSE#TRPBF | 功能描述:IC REG BUCK BST SYNC ADJ 12MSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:2,500 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:1.2V，1.5V，1.8V，2.5V 输入电压:2.7 V ~ 20 V PWM 型:- 频率 - 开关:- 电流 - 输出:50mA 同步整流器:是 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:10-TFSOP，10-MSOP（0.118"，3.00mm 宽）裸露焊盘 包装:带卷 (TR) 供应商设备封装:10-MSOP 裸露焊盘 |
| LTC3536IDD#PBF | 功能描述:IC REG BUCK BOOST SYNC ADJ 12DFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:2,500 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:1.2V，1.5V，1.8V，2.5V 输入电压:2.7 V ~ 20 V PWM 型:- 频率 - 开关:- 电流 - 输出:50mA 同步整流器:是 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:10-TFSOP，10-MSOP（0.118"，3.00mm 宽）裸露焊盘 包装:带卷 (TR) 供应商设备封装:10-MSOP 裸露焊盘 |
| LTC3536IDD#TRPBF | 功能描述:IC REG BUCK BOOST SYNC ADJ 12DFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:2,500 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:1.2V，1.5V，1.8V，2.5V 输入电压:2.7 V ~ 20 V PWM 型:- 频率 - 开关:- 电流 - 输出:50mA 同步整流器:是 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:10-TFSOP，10-MSOP（0.118"，3.00mm 宽）裸露焊盘 包装:带卷 (TR) 供应商设备封装:10-MSOP 裸露焊盘 |
| LTC3536IMSE#PBF | 功能描述:IC REG BUCK BST SYNC ADJ 12MSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:2,500 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:1.2V，1.5V，1.8V，2.5V 输入电压:2.7 V ~ 20 V PWM 型:- 频率 - 开关:- 电流 - 输出:50mA 同步整流器:是 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:10-TFSOP，10-MSOP（0.118"，3.00mm 宽）裸露焊盘 包装:带卷 (TR) 供应商设备封装:10-MSOP 裸露焊盘 |
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