参数资料
型号: LTC3536EDD#PBF
厂商: Linear Technology
文件页数: 3/28页
文件大小: 0K
描述: IC REG BUCK BOOST SYNC ADJ 12DFN
标准包装: 121
类型: 降压(降压),升压(升压)
输出类型: 可调式
输出数: 1
输出电压: 1.8 V ~ 5.5 V
输入电压: 1.8 V ~ 5.5 V
PWM 型: 电压模式,混合
频率 - 开关: 300kHz ~ 2MHz
电流 - 输出: 1A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 10-WFDFN 裸露焊盘
包装: 管件
供应商设备封装: 10-DFN(3x3)
LTC3536
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating junction
temperature range, otherwise specifications are at T A = 25°C (Note 2). V IN = 3.3V, V OUT = 3.3V, R T = 100kΩ unless otherwise noted.
PARAMETER
Quiescent Current, Active (I VIN )
CONDITIONS
V FB = 0.7V, V MODE/SYNC = 0V
MIN
TYP
MAX
800
UNITS
μA
Input Current Limit
Peak Current Limit
Burst Mode Peak Current Limit
Reverse Current Limit
NMOS Switch Leakage
PMOS Switch Leakage
NMOS Switch On-Resistance
PMOS Switch On-Resistance
V MODE/SYNC = 0V (Note 4)
V MODE/SYNC = 0V (Note 4)
V MODE/SYNC = V IN (Note 4)
(Note 4)
Switch B, C: SW1 = SW2 = 5.5V, V IN = 5.5V, V OUT = 5.5V
Switch A, D: SW1 = SW2 = 0V, V IN = 5.5V, V OUT = 5.5V
Switch B (From SW1 to GND) (Note 6)
Switch C (From SW2 to GND) (Note 6)
Switch A (From V IN to SW1) (Note 6)
Switch D (From V OUT to SW2) (Note 6)
l
l
2
0.4
0.3
2.5
3.4
0.6
0.55
0.1
0.1
0.11
0.1
0.12
0.145
4
1
1
A
A
A
A
μA
μA
Ω
Ω
Ω
Ω
Frequency Accuracy
Frequency Accuracy Default
Internal Soft-Start Time
Maximum Duty Cycle
Minimum Duty Cycle
R T = 100k
R T = V IN
V FB from 0.06V to 0.54V
Percentage of Period SW2 is Low in Boost Mode
Percentage of Period SW1 is High in Buck Mode
l
l
l
l
0.8
0.96
0.6
88
1
1.2
0.9
91
1.2
1.44
1.2
0
MHz
MHz
ms
%
%
Error Amplifier AVOL
90
dB
Error Amplifier Sink Current
Error Amplifier Source Current
MODE/SYNC Input Logic Threshold
FB = 1.3V, VC = 1V
FB = 0.3V, VC = 0V
Disable Burst Mode Operation
250
400
0.3
300
480
1
μA
μA
V
MODE/SYNC External Synchronization
MODE/SYNC Synchronization Frequency
MODE/SYNC Input Current
SHDN Input Logic Threshold
SHDN Input Current
SYNC Level High
SYNC Level Low
V MODE/SYNC = 5.5V = V IN
V SHDN = 5.5V = V IN
l
l
l
l
1.2
0.3
0.3
0.4
2
1
1
1
V
V
MHz
μA
V
μA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3536 is tested under pulsed load conditions such that
T J ≈ T A . The LTC3536E is guaranteed to meet specifications
from 0°C to 125°C junction temperature. Specifications over the
–40°C to 125°C operating junction temperature range are assured by
design, characterization and correlation with statistical process controls.
The LTC3536I is guaranteed over the full –40°C to 125°C operating
junction temperature range. Note that the maximum ambient temperature
consistent with these specifications is determined by specific operating
conditions in conjunction with board layout, the rated package thermal
impedance and other environmental factors. The junction temperature
(T J , in °C) is calculated from the ambient temperature (T A , in °C) and
power dissipation (P D , in watts) according to the formula:
Note 3: This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. The maximum
rated junction temperature will be exceeded when this protection is active.
Continuous operation above the specified absolute maximum operating
junction temperature may impair device reliability or permanently damage
the device.
Note 4: Current measurements are performed when the LTC3536 is
not switching. The current limit values measured in operation will be
somewhat higher due to the propagation delay of the comparators.
Note 5: Guaranteed by design characterization and correlation with
statistical process controls.
Note 6: Guaranteed by correlation and design.
T J = T A + (P D ? θ JA ),
where θ JA (in °C/W) is the package thermal impedance.
3536fa
3
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