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参数资料
| 型号： | LTC3709EUH#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 19/24页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM CM 32-QFN |
| 标准包装： | 2,500 |
| 系列： | PolyPhase® |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 200kHz |
| 占空比： | 90% |
| 电源电压： | 5 V ~ 36 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 32-WFQFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
LTC3709
APPLICATIO S I FOR ATIO
?
I LIMIT ≥ ?
) ( )
?
+
5 . 1 A ? ? 2 = 24 A
?
equal to ?I LOAD (ESR), where ESR is the effective series
resistance of C OUT . ? I LOAD also begins to charge or
discharge C OUT generating a feedback error signal used by
the regulator to return V OUT to its steady-state value.
146 mV
?
? ( 1 . 5 ) ( 0 . 010 ?
1
2 ?
During this recovery time, V OUT can be monitored for
overshoot or ringing that would indicate a stability prob-
and double check the assumed T J in the MOSFET:
28 V – 2 . 5 V ? 24 A ?
( ) (
)
? ? 1 . 5 0 . 010 ? = 1 . 97 W
lems.TheI TH pinexternalcomponentsshowninFigure9
will provide adequate compensation for most applica-
tions. For a detailed explanation of switching control loop
theory see Application Note 76.
P BOT
=
28 V ? 2 ?
2
R ON =
= 476 k
( )( )( )
? = 2 . 3 μ H
2 . 5 V ? 2 . 5 V ?
? 1 ?
(
)( )( )
2 . 5 V ? 24 A ?
( ) (
)
? 1 . 4 0 . 0165 ? +
?
( )( ) ( )( )( )
? I L =
? = 5 . 1 A
( ) ( )
? 1 –
Design Example
As a design example, take a supply with the following
specifications: V IN = 7V to 28V (15V nominal), V OUT =
2.5V, I OUT(MAX) = 20A, f = 250kHz. First, calculate the
timing resistor:
2 . 5 V
0 . 7 V 250 kHz 30 pF
and choose the inductor for about 40% ripple current at
the maximum V IN . Maximum output current for each
channel is 10A:
L =
250 kHz 0 . 4 10 A ? 28 V ?
Selecting a standard value of 1.8 μ H results in a maximum
ripple current of:
2 . 5 V ? 2 . 5 V ?
250 kHz 1 . 8 μ H ? 28 V ?
Next, choose the synchronous MOSFET switch. Choosing
a Si4874 (R DS(ON) = 0.0083 ? (NOM) 0.010 ? (MAX),
q JA = 40 ° C/W) yields a nominal sense voltage of:
V SNS(NOM) = (10A)(1.3)(0.0083 ? ) = 108mV
Tying V RNG to 1.1V will set the current sense voltage range
for a nominal value of 110mV with current limit occurring
at 146mV. To check if the current limit is acceptable,
assume a junction temperature of about 80 ° C above a
70 ° C ambient with ρ 150 ° C = 1.5:
T J = 70 ° C + (1.97W)(40 ° C/W) = 149 ° C
Because the top MOSFET is on for such a short time, an
Si4884 R DS(ON)(MAX) = 0.0165 ? , C RSS = 100pF, θ JA =
40 ° C/W will be sufficient. Checking its power dissipation
at current limit with ρ 100 ° C = 1.4:
2
P TOP =
28 V ? 2 ?
2
1 . 7 28 V 12 A 100 pF 250 kHz
= 0 . 30 W + 0 . 40 W = 0 . 7 W
T J = 70 ° C + (0.7W)(40 ° C/W) = 98 ° C
The junction temperatures will be significantly less at
nominal current, but this analysis shows that careful
attention to heat sinking will be necessary in this circuit.
C IN is chosen for an RMS current rating of about 10A
at 85 ° C. The output capacitors are chosen for a low ESR
of 0.013 ? to minimize output voltage changes due to
inductor ripple current and load steps. The ripple voltage
will be only:
? V OUT(RIPPLE) = ? I L(MAX) (ESR)
= (5.1A) (0.013 ? ) = 66mV
However, a 0A to 10A load step will cause an output
change of up to:
? V OUT(STEP) = ? I LOAD (ESR) = (10A) (0.013 ? ) = 130mV
An optional 22 μ F ceramic output capacitor is included to
minimize the effect of ESL in the output ripple. The
complete circuit is shown in Figure 9.
3709fb
19
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