参数资料
型号: LTC3732CG
厂商: Linear Technology
文件页数: 10/28页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 36-SSOP
标准包装: 37
PWM 型: 电流模式
输出数: 1
频率 - 最大: 750kHz
占空比: 98.5%
电源电压: 4.5 V ~ 7 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: 0°C ~ 70°C
封装/外壳: 36-SSOP(0.209",5.30mm 宽)
包装: 管件
产品目录页面: 1335 (CN2011-ZH PDF)
LTC3732
OPERATIO
(Refer to Functional Diagram)
voltage. When the load current increases, it causes a slight
decrease in the EAIN pin voltage relative to the 0.6V
reference, which in turn causes the I TH voltage to increase
until each inductor’s average current matches one third of
the new load current (assuming all three current sensing
resistors are equal). In Burst Mode operation and stage
shedding mode, after each top MOSFET has turned off, the
bottom MOSFET is turned on until either the inductor
current starts to reverse, as indicated by current compara-
tor I 2 , or the beginning of the next cycle.
The top MOSFET drivers are biased from floating boot-
strap capacitor C B , which is normally recharged during
each off cycle, through an external Schottky diode. When
V IN decreases to a voltage close to V OUT , however, the loop
may enter dropout and attempt to turn on the top MOSFET
continuously. The dropout detector counts the number of
oscillator cycles that the bottom MOSFET remains off and
periodically forces a brief on period to allow C B to re-
charge.
The main control loop is shut down by pulling the RUN/SS
pin low. Releasing RUN/SS allows an internal 1.5 μ A
current source to charge soft-start capacitor C SS . When
C SS reaches 1.5V, the main control loop is enabled and the
internally buffered I TH voltage is clamped but allowed to
ramp as the voltage on C SS continues to ramp. This “soft-
start” clamping prevents abrupt current from being drawn
from the input power source. When the RUN/SS pin is low,
all functions are kept in a controlled state. The RUN/SS pin
is pulled low when the V CC input voltage is below 4V or
when the IC die temperature rises above 150 ° C.
Low Current Operation
The FCB pin is a multifunction pin: 1) an analog compara-
tor input to provide regulation for a secondary winding by
forcing temporary forced PWM operation and 2) a logic
input to select between three modes of operation.
A) Burst Mode Operation
When the FCB pin voltage is below 0.6V, the controller
performs as a continuous, PWM current mode synchro-
nous switching regulator. The top and bottom MOSFETs
are alternately turned on to maintain the output voltage
independent of direction of inductor current. When the
FCB pin is below V CC – 1.5V but greater than 0.6V, the
controller performs as a Burst Mode switching regulator.
Burst Mode operation sets a minimum output current level
before turning off the top switch and turns off the synchro-
nous MOSFET(s) when the inductor current goes nega-
tive. This combination of requirements will, at low current,
force the I TH pin below a voltage threshold that will
temporarily shut off both output MOSFETs until the output
voltage drops slightly. There is a burst comparator having
60mV of hysteresis tied to the I TH pin. This hysteresis
results in output signals to the MOSFETs that turn them on
for several cycles, followed by a variable “sleep” interval
depending upon the load current. The resultant output
voltage ripple is held to a very small value by having the
hysteretic comparator after the error amplifier gain block.
B) Stage Shedding Operation
When the FCB pin is tied to the V CC pin, Burst Mode
operation is disabled and the forced minimum inductor
current requirement is removed. This provides constant
frequency, discontinuous current operation over the wid-
est possible output current range. At approximately 10%
of maximum designed load current, the second and third
output stages are shut off and the phase 1 controller alone
is active in discontinuous current mode. This “stage
shedding” optimizes efficiency by eliminating the gate
charging losses and switching losses of the other two
output stages. Additional cycles will be skipped when the
output load current drops below 1% of maximum de-
signed load current in order to maintain the output voltage.
This stage shedding operation is not as efficient as Burst
Mode operation at very light loads, but does provide lower
noise, constant frequency operating mode down to very
light load conditions.
C) Continuous Current Operation
Tying the FCB pin to ground will force continuous current
operation. This is the least efficient operating mode, but
may be desirable in certain applications. The output can
source or sink current in this mode. When forcing con-
tinuous operation and sinking current, this current will be
forced back into the main power supply, potentially
boosting the input supply to dangerous voltage levels—
BEWARE!
3732f
10
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