参数资料
型号: LTC3850IGN-2#TRPBF
厂商: Linear Technology
文件页数: 27/36页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 28-SSOP
产品培训模块: LTC3850 Dual Output DC/DC Switching Regulator Controller
标准包装: 2,500
系列: PolyPhase®
PWM 型: 电流模式
输出数: 2
频率 - 最大: 860kHz
占空比: 97.2%
电源电压: 4 V ~ 30 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 28-SSOP(0.154",3.90mm 宽)
包装: 带卷 (TR)
LTC3850-2
APPLICATIONS INFORMATION
V IN
7V TO
2.2Ω
1μF
22μF
50V
20V
L1
3.3μH
M1
4.7μF
0.1μF
D3
V IN PGOOD EXTV CC INTV CC
TG1 TG2
BOOST1
BOOST2
D4
0.1μF
M2
L2
2.2μH
SW1
SW2
6.19k
1%
LTC3850-2
BG1
MODE/PLLIN
BG2
PGND
10k, 1%
4.12k
1%
FREQ/PLLFLTR
SENSE1 +
SENSE2 +
33pF
1.33k
1%
0.1μF
SENSE1
SENSE2 –
0.1μF
1.5k
1%
33pF
V OUT1
3.3V
5A
63.4k
RUN1
V FB1
I TH1
RUN2
V FB2
I TH2
25.5k
V OUT2
1.8V
5A
1%
C OUT1
100μF
X2
20k
1%
1800pF
4.75k
1%
100pF
0.1μF
TK/SS1
SGND
TK/SS2
0.1μF
3.16k
1%
2200pF
5.49k
1%
100pF
20k
1%
1%
C OUT2
100μF
X2
L1, L2: COILTRONICS HCP0703
M1, M2: VISHAY SILICONIX Si4816BDY
C OUT1 , C OUT2 : TAIYO YUDEN JMK325BJ107MM
Figure 14. High Ef?ciency Dual 500kHz 3.3V/1.8V Step-Down Converter
38502 F14
The duty cycle percentage should be maintained from cycle
to cycle in a well-designed, low noise PCB implementation.
Variation in the duty cycle at a subharmonic rate can suggest
noise pickup at the current or voltage sensing inputs or
inadequate loop compensation. Overcompensation of the
loop can be used to tame a poor PC layout if regulator
bandwidth optimization is not required. Only after each
controller is checked for its individual performance should
both controllers be turned on at the same time. A particularly
dif?cult region of operation is when one controller channel
is nearing its current comparator trip point when the other
channel is turning on its top MOSFET. This occurs around
50% duty cycle on either channel due to the phasing of the
internal clocks and may cause minor duty cycle jitter.
Reduce V IN from its nominal level to verify operation
of the regulator in dropout. Check the operation of the
Investigate whether any problems exist only at higher out-
put currents or only at higher input voltages. If problems
coincide with high input voltages and low output currents,
look for capacitive coupling between the BOOST, SW, TG,
and possibly BG connections and the sensitive voltage
and current pins. The capacitor placed across the current
sensing pins needs to be placed immediately adjacent to
the pins of the IC. This capacitor helps to minimize the
effects of differential noise injection due to high frequency
capacitive coupling. If problems are encountered with
high current output loading at lower input voltages, look
for inductive coupling between C IN , Schottky and the top
MOSFET components to the sensitive current and voltage
sensing traces. In addition, investigate common ground
path voltage pickup between these components and the
SGND pin of the IC.
undervoltage lockout circuit by further lowering V IN while
monitoring the outputs to verify operation.
38502f
27
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