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参数资料
| 型号： | LTC3850IGN-2#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 8/36页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM CM 28-SSOP |
| 产品培训模块： | LTC3850 Dual Output DC/DC Switching Regulator Controller |
| 标准包装： | 2,500 |
| 系列： | PolyPhase® |
| PWM 型： | 电流模式 |
| 输出数： | 2 |
| 频率 - 最大： | 860kHz |
| 占空比： | 97.2% |
| 电源电压： | 4 V ~ 30 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 28-SSOP（0.154"，3.90mm 宽） |
| 包装： | 带卷 (TR) |
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LTC3850-2
PIN FUNCTIONS
RUN1, RUN2 (Pin 1, Pin 13): Run Control Inputs. A voltage
above 1.2V on either pin turns on the IC. However, forcing
either of these pins below 1.2V causes the IC to shut down
that particular channel. There are 0.5μA pull-up currents
for these pins. Once the RUN pin rises above 1.2V, an
additional 4.5μA pull-up current is added to the pin.
SENSE1 + , SENSE2 + (Pin 2, Pin 12): Current Sense
Comparator Inputs. The (+) inputs to the current
comparators are normally connected to DCR sensing
networks or current sensing resistors.
SENSE1 – , SENSE2 – (Pin 3, Pin 11): Current Sense
Comparator Inputs. The (–) inputs to the current
comparators are connected to the outputs.
TK/SS1, TK/SS2 (Pin 5, Pin 9): Output Voltage Tracking
and Soft-Start Inputs. When one channel is con?gured to
be master of the two channels, a capacitor to ground at
this pin sets the ramp rate for the master channel’s output
voltage. When the channel is con?gured to be the slave
of two channels, the V FB voltage of the master channel is
reproduced by a resistor divider and applied to this pin.
Internal soft-start currents of 1.3μA charge the soft-start
capacitors.
I TH1 , I TH2 (Pin 6, Pin 8): Current Control Thresholds and
Error Ampli?er Compensation Points. Each associated
channels’ current comparator tripping threshold increases
with its I TH control voltage.
V FB1 , V FB2 (Pin 4, Pin 10): Error Ampli?er Feedback
Inputs. These pins receive the remotely sensed feedback
voltages for each channel from external resistive dividers
across the outputs.
SGND (Pin 7): Signal Ground. All small-signal components
and compensation components should connect to this
ground, which in turn connects to PGND at one point.
EXTV CC (Pin 14): External Power Input to an Internal Switch
Connected to INTV CC . This switch closes and supplies the
IC power, bypassing the internal low dropout regulator,
whenever EXTV CC is higher than 4.7V. Do not exceed 6V
on this pin and ensure V IN > V EXTVCC at all times.
PGOOD (Pin 15): Power Good Indicator Output. Open-drain
logic out that is pulled to ground when either channel
output exceeds the ± 7.5% regulation window, after the
internal 17μs power bad mask timer expires.
PGND (Pin 19): Power Ground Pin. Connect this pin closely
to the sources of the bottom N-channel MOSFETs, the (–)
terminal of CV CC and the (–) terminal of C IN .
INTV CC (Pin 21): Internal 5V Regulator Output. The con-
trol circuits are powered from this voltage. Decouple this
pin to PGND with a 4.7μF low ESR tantalum or ceramic
capacitor.
V IN (Pin 22): Main Input Supply. Decouple this pin to
PGND with a capacitor (0.1μF to 1μF). For applications
where the main input power is 5V, tie the V IN and INTV CC
pins together.
BG1, BG2 (Pins 23, 20): Bottom Gate Driver Outputs. These
pins drive the gates of the bottom N-Channel MOSFETs
and swings between PGND and INTV CC .
BOOST1, BOOST2 (Pins 24, 18): Boosted Floating Driver
Supplies. The (+) terminal of the boost-strap capacitors
connect to these pins. These pins swing from a diode
voltage drop below INTV CC up to V IN + INTV CC .
TG1, TG2 (Pins 25, 17): Top Gate Driver Outputs. These are
the outputs of ?oating drivers with a voltage swing equal
to INTV CC superimposed on the switch nodes voltages.
SW1, SW2 (Pins 26, 16): Switch Node Connections to
Inductors. Voltage swing at these pins are from a body
diode voltage drop below ground to V IN .
MODE/PLLIN (Pin 27): Force Continuous Mode, Burst
Mode, or Pulse-Skipping Mode Selection Pin and
External Synchronization Input to Phase Detector Pin.
Connect this pin to SGND to force both channels into
the continuous mode of operation. Connect to INTV CC
to enable pulse-skipping mode of operation. Leaving the
pin ?oating will enable Burst Mode operation. A clock on
the pin will force the controller into continuous mode of
operation and synchronize the internal oscillator.
FREQ/PLLFLTR (Pin 28): The Phase-Locked Loop’s
Low-Pass Filter is Tied to This Pin. Alternatively, this pin
can be driven with a DC voltage to vary the frequency of
the internal oscillator.
38502f
8
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