参数资料
型号: LTC4252A-2IMS
厂商: Linear Technology
文件页数: 31/36页
文件大小: 328K
描述: IC CTRLR HOTSWAP NEG VOLT 10MSOP
标准包装: 50
类型: 热交换控制器
应用: 通用
内部开关:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 10-TFSOP,10-MSOP(0.118",3.00mm 宽)
供应商设备封装: 10-MSOP
包装: 管件
LTC4252-1/LTC4252-2
LTC4252A-1/LTC4252A-2
31
425212fe
For more information www.linear.com/LTC4252-1
applicaTions inForMaTion
425212 F20
UV
OV
V
EE
V
IN
SENSE
SS
TIMER
GATE
PWRGD
DRAIN
LTC4252A-1
R1
392k
1%
R2
30.1k
1%
C
T
0.68礔
C
SS
68nF
C
C
10nF
48V
R
S
0.02
R4
38.3k
Q1
IRF530S
V
OUT
R
C
10
R3
5.1k
R
IN
3?1.8k
1/4W EACH
1
9
8
10
3
2
7
6
4
5
C1
10nF
C
IN
1礔
C
L
100礔
48RTN
(SHORT PIN)
48RTN
R
D
 1M
R5 27
R
G
 10
LOAD
EN
*
*MOC207
+
**DIODES, INC
 
RECOMMENDED FOR HARSH ENVIRONMENTS
D
IN
 
DDZ13B
**
425212 F21
UV
OV
V
EE
V
IN
SENSE
SS
TIMER
GATE
PWRGD
DRAIN
LTC4252A-1
R1
392k
1%
R2
30.1k
1%
C
T
0.68礔
C
SS
68nF
C3
330nF
25V
C2
10nF
100V
48V
R4
1k
1%
Q1
IRF530S
V
OUT
R3
5.1k
R
IN
3?1.8k
1/4W EACH
1
9
8
10
3
2
7
6
4
5
C1
10nF
C
IN
1礔
C
L
100礔
48RTN
(SHORT PIN)
48RTN
R
D
 1M
R
G
 10
LOAD
EN
*
*MOC207
**DIODES, INC
 
RECOMMENDED FOR HARSH ENVIRONMENTS
D
IN
 
DDZ13B
**
+
Figure 20. Circuit Breaker with Foldback Current Limit Application
Figure 21. Inrush Control Without a Sense Resistor Application
At power-up, Q5 and Q8 are held off low by the SS pin
of the LTC4252; resistors R5 and R8 pull the SENSE pin
closed to V
EE
. V
EE
 is connected to the power supply with
lower voltage through the body diodes Q2 or Q3 until Q2
or Q3 is turned on. This allows the LTC4252 to perform
a start-up cycle and ramp up the SS and GATE voltage.
As the SS voltage ramps up to 2.2V , it turns on Q5 and Q8
and pulls TIMER low through Q6 and Q9. The sense voltage
rises as current flows into R5 and R8 through resistors R3
and R6. The ACL amplifier of the LTC4252 servos the sense
voltage to about 100mV as the GATE voltage regulates Q2
and Q3. Current flows into R4, Q4 and R7, Q7 as Q2 and
Q3 turn on. The respective node voltages at the R3 and R4
connection and the R6 and R7 connection are always kept
equal to their respective sense voltages by the Q4 and Q2
V
DS
 drop and the Q7 and Q3 V
DS
 drop assuming the Q5
and Q8 V
DS
 drop is negligible.
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