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参数资料
| 型号： | LX1562IDM-TR |
| 厂商： | MICROSEMI CORP-ANALOG MIXED SIGNAL GROUP |
| 元件分类： | 稳压器 |
| 英文描述： | 0.5 A POWER FACTOR CONTROLLER, PDSO8 |
| 封装： | ROHS COMPLIANT, PLASTIC, SOIC-8 |
| 文件页数： | 21/25页 |
| 文件大小： | 430K |
| 代理商： | LX1562IDM-TR |
SECOND-GENERATION POWER FACTOR C ONTROLLER
LX1562/1563
PRODUCT DA T ABOOK 1996/1997
5
Copyright 1996
Rev. 1.3a
8/30
P RODUCTION
D ATA
S HEET
BLOCK DIAGRAM / PIN DESCRIPTIONS
V
IN
8
GND
6
INV
1
E.A. OUT 2
MULT IN
3
C.S.
4
I
DET
5
OUT
7
Input supply voltage.
Input supply voltage return. Must always be the lowest potential of all the pins.
Inverting input of the Error Amplifier. The output of the Boost converter should be resistively divided to 2.5V and
connected to this pin.
The output of the Error Amplifier. A feedback compensation network is placed between this pin and the INV pin.
Input to the multiplier stage. The full-wave rectified AC is divided to less than 2V and is connected to this pin.
Input to the PWM comparator. Current is sensed in the Boost stage MOSFET by a resistor in the source lead, and is
fed to this pin. An internal blanking circuit eliminates the RC low pass filter that otherwise is required to eliminate leading
edge spike.
A current driven logic input with internal clamp.
A second winding on the Boost inductor senses the flyback voltage associated with the zero crossing of the inductor
current and feeds it to the I
DET pin through a limiting resistor. Low on this pin causes V O (pin 7) to go high.
PWM output pin. A totem-pole output stage specially designed for direct driving the MOSFET.
Pin
#
Description
FUNCTIONAL DESCRIPTION
1.72V
M2
1.8V
1s
Delay
L1
5
I
DET
V
REF
V
TIMER
C.S.
V
REF
2
1
E.A. INV.
E.A. OUT
UVLO
13.1V (1562)
9.8V (1563)
8
3
MULT
IN
V
IN
Internal
Bias
2.5V
REF
V
REF
6.8V To All
Internal Circuitry
L1
V
IN
7
L1
EMI
Filter
AC
Input
C1
4
C.S.
OUT
5.2V (1562)
2.1V (1563)
D1
1.24V
M1
LATCH
R
Q
S
Q
300
O
B
SO
LETE
PRO
D
UCT
NOT
RECOMMENDED
FOR
NEW
DESIGNS
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