参数资料
型号: LX1562IDM-TR
厂商: MICROSEMI CORP-ANALOG MIXED SIGNAL GROUP
元件分类: 稳压器
英文描述: 0.5 A POWER FACTOR CONTROLLER, PDSO8
封装: ROHS COMPLIANT, PLASTIC, SOIC-8
文件页数: 8/25页
文件大小: 430K
代理商: LX1562IDM-TR
SECOND-GENERATION POWER FACTOR C ONTROLLER
LX1562/1563
PRODUCT DA T ABOOK 1996/1997
Copyright 1996
Rev. 1.3a
8/30
16
P RODUCTION D ATA
S HEET
IC DESCRIPTION
CURRENT DETECT LOGIC (continued)
upper 7.8V clamp prevents input overvoltage breakdown dur-
ing switch off time, while during the on time the lower 0.7V
clamp prevents substrate injection. An internal current limit
resistor protects the lower clamp transistor in case the “I
DET” pin
is accidently shorted to ground.
START-UP TIMER
A start-up timer circuit eliminates the need for an external os-
cillator when used in stand alone applications. The timer, as
shown in Figure 30, provides a means to automatically start the
pre converter if the latch output Q comes up in a wrong (HI)
state. The timer capacitor ramps up and resets the latch to a
low state, turning the output driver on.
OUTPUT DRIVER STAGE
The LX1562/63 output driver is designed for direct driving of
an external power MOSFET.
It is a totem pole stage with
±500mA peak current capability.
This typically results in a
130ns rise and fall times into a 1000pF capacitive load. Addi-
tionally the output is held low during the undervoltage condi-
tion to ensure that the MOSFET remains in the off state until
supply voltage reaches the start-up threshold.
Internal voltage clamping ensures that output driver is al-
ways lower than 13.8V (typ.) when supply voltage variation
exceeds more than rated V
GS thr eshold (typ 20V) of the exter-
nal MOSFET. This eliminates an external zener diode and extra
power dissipation associated with it that otherwise is required
for reliable circuit operation.
1.72V
1s
Delay
5
I
DEF
V
REF
V
TIMER
C.S. Latch
L1
7
L1
4
C.S.
OUT
V
M0
HI
300
C.S.
R
Q
S
FIGURE 30 — START-UP TIMER & CURRENT DETECT LOGIC CIRCUITRY
O
B
SO
LETE
PRO
D
UCT
NOT
RECOMMENDED
FOR
NEW
DESIGNS
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