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参数资料
| 型号： | LXT384LE |
| 元件分类： | 通信、网络模块及开发工具 |
| 英文描述： | Telecomm/Datacomm |
| 中文描述： | 电信/数据通信 |
| 文件页数： | 21/80页 |
| 文件大小： | 1112K |
| 代理商： | LXT384LE |
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Octal T1/E1/J1 Transceiver
—
LXT384
Datasheet
21
108
108
109
109
B13
B13
B12
B12
TPOS4
TDATA4
TNEG4
UBS4
DI
DI
DI
DI
Transmit Positive Data Input.
Transmit Data Input.
Transmit Negative Data Input.
Unipolar/Bipolar Select Input.
110
A14
RCLK4
DO
Receive Clock Output.
111
111
112
112
A13
A13
A12
A12
RPOS4
RDATA4
RNEG4
BPV4
DO
DO
DO
DO
Receive Positive Data Output.
Receive Data Output.
Receive Negative Data Output.
Bipolar Violation Detect Output.
113
E11
LOS4
DO
Loss of Signal Output.
114
E14
OE
DI
Output Driver Enable Input.
If this pin is asserted Low all analog driver
outputs immediately enter a high impedance mode to support
redundancy applications without external mechanical relays. All other
internal circuitry stays active. In software mode, TTIP and TRING can
be tristated on a port-by-port basis by writing a
‘
1
’
to the OEx bit in the
Output Enable Register (OER).
115
E13
CLKE
DI
Clock Edge Select Input.
In clock recovery mode, setting CLKE High
causes RDATA or RPOS and RNEG to be valid on the falling edge of
RCLK and SDO to be valid on the rising edge of SCLK. Setting CLKE
Low makes RDATA or RPOS and RNEG to be valid on the rising edge
of RCLK and SDO to be valid on the falling edge of SCLK. In Data
recovery Mode, RDATA or RPOS/RNEG are active High output polarity
when CLKE is High and active Low polarity when CLKE is Low.
116
A11,
B11
TVCC4
S
Transmit Driver Power Supply.
117
118
B10
A10
TTIP4
TRING4
AO
AO
Transmit Tip Output.
Transmit Ring Output.
119
A9, B9
TGND4
S
Transmit Driver Ground.
120
121
A8
B8
RTIP4
RRING4
AI
AI
Receive Tip Input.
Receive Ring Input.
122
C9, D9
TGND5
S
Transmit Driver Ground.
123
124
C10
D10
TRING5
TTIP5
AO
AO
Transmit Ring Output.
Transmit Tip Output.
125
C11,
D11
TVCC5
S
Transmit Driver Power Supply.
126
127
D8
C8
RRING5
RTIP5
AI
AI
Receive Ring Input.
Receive Tip Input.
128
C4, D4
TVCC6
S
Transmit Driver Power Supply.
Table 1. LXT384 Pin Description (Sheet 11 of 12)
Pin #
QFP
Ball #
PBGA
Symbol
I/O
1
Description
1. DI: Digital Input; DO: Digital Output; DI/O: Digital Bidirectional Port; AI: Analog Input; AO: Analog Output
S: Power Supply; N.C.: Not Connected.
CLKE RPOS/RNEG SDO
L
H
SCLK
SCLK
RCLK
RCLK
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相关代理商/技术参数 |
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| LXT386 | 制造商:INTEL 制造商全称:Intel Corporation 功能描述:QUAD T1/E1/J1 Transceiver |
| LXT386BE | 制造商:未知厂家 制造商全称:未知厂家 功能描述:PCM TRANSCEIVER|QUAD|CEPT PCM-30/E-1|CMOS|BGA|160PIN|PLASTIC |
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| LXT400 | 制造商:LVL1 制造商全称:LVL1 功能描述:All Rate Extended Range Switched 56/DDS Transceiver |
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