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参数资料
型号： M30201F4T-FP
元件分类： 微控制器/微处理器
英文描述： 16-BIT, FLASH, 10 MHz, MICROCONTROLLER, PQFP56
封装： PLASTIC, QFP-56
文件页数： 147/158页
文件大小： 1633K
代理商： M30201F4T-FP
89
Under
development
Mitsubishi microcomputers
M30201 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
A-D Converter
Item
Performance
Method of A-D conversion Successive approximation (capacitive coupling amplifier)
Analog input voltage (Note 1) 0V to AVCC (VCC)
Operating clock fAD (Note 2) VCC = 5V
fAD, divide-by-2 of fAD, divide-by-4 of fAD, fAD=f(XIN)
VCC = 3V
divide-by-2 of fAD, divide-by-4 of fAD, fAD=f(XIN)
Resolution
8-bit or 10-bit (selectable)
Absolute precision
VCC = 5V
Without sample and hold function
–
3LSB
With sample and hold function (8-bit resolution)
–
2LSB
With sample and hold function (10-bit resolution)
–
3LSB
VCC = 3V
Without sample and hold function (8-bit resolution)
–
2LSB
Operating modes
One-shot mode, repeat mode, single sweep mode, repeat sweep mode 0,
and repeat sweep mode 1
Analog input pins
8 pins (AN0 to AN7) + 5 pins (AN50 to AN54)
A-D conversion start condition Software trigger
A-D conversion starts when the A-D conversion start flag changes to “1”
Conversion speed per pin Without sample and hold function
8-bit resolution: 49 fAD cycles, 10-bit resolution: 59 fAD cycles
With sample and hold function
8-bit resolution: 28 fAD cycles, 10-bit resolution: 33 fAD cycles
A-D Converter
The A-D converter consists of one 10-bit successive approximation A-D converter circuit with a capacitive
coupling amplifier. Pins P60 to P67, and P50 to P54 also function as the analog signal input pins. The
direction registers of these pins for A-D conversion must therefore be set to input. The Vref connect bit (bit
5 at address 03D716) can be used to isolate the resistance ladder of the A-D converter from the reference
voltage input pin (VREF) when the A-D converter is not used. Doing so stops any current flowing into the
resistance ladder from VREF, reducing the power dissipation. When using the A-D converter, start A-D
conversion only after setting bit 5 of 03D716 to connect VREF.
The result of A-D conversion is stored in the A-D registers of the selected pins. When set to 10-bit precision,
the low 8 bits are stored in the even addresses and the high 2 bits in the odd addresses. When set to 8-bit
precision, the low 8 bits are stored in the even addresses.
Table 1.30 shows the performance of the A-D converter. Figure 1.82 shows the block diagram of the A-D
converter, and Figures 1.83 and 1.84 show the A-D converter-related registers.
Note 1: Does not depend on use of sample and hold function.
Note 2: Without sample and hold function, set the fAD frequency to 250kHz min.
With the sample and hold function, set the fAD frequency to 1MHz min.
Table 1.30. Performance of A-D converter
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相关代理商/技术参数
参数描述
M30201F4T-XXXFP 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY
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