参数资料
型号: M30600E8GP
元件分类: 微控制器/微处理器
英文描述: 16-BIT, OTPROM, 10 MHz, MICROCONTROLLER, PQFP100
封装: 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100
文件页数: 106/139页
文件大小: 1782K
代理商: M30600E8GP
Mitsubishi microcomputers
M16C / 60 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Timer B
69
(2) Event counter mode
In this mode, the timer counts an external signal or an internal timer's overflow. (See Table 1.29.) Figure
1.53 shows the configuration of the timer Bi mode register in event counter mode.
Figure 1.53. Configuration of timer Bi mode register in event counter mode
Item
Specification
Count source
External signals input to TBiIN pin
Effective edge of count source can be a rising edge, a falling edge, or falling
and rising edges as selected by software
Count operation
Counts down
When the timer underflows, the reload register's content is reloaded and the timer starts over again
Divide ratio
1/(n+1)
n : Set value
Count start condition
Count start flag is set (= 1)
Count stop condition
Count start flag is reset (= 0)
Interrupt request generation timing The timer underflows
TBiIN pin function
Count source input
Read from timer
Count value can be read out by reading timer Bi register
Write to timer
When counting stopped
When a value is written to timer Bi register, it is written to both reload register and counter
When counting in progress
When a value is written to timer Bi register, it is written to only reload register
(Transferred to counter at next reload time)
Table 1.29. Timer specifications in event counter mode
Timer Bi mode register
Symbol
Address
When reset
TBiMR(i=0 to 2)
039B 16 to 039D16
00XX0000 2
Bit name
Function
Bit symbol
W
R
b7
b6
b5
b4
b3
b2
b1
b0
Operation mode
select bit
0 1 : Event counter mode
b1 b0
TMOD1
TMOD0
MR0
Count polarity select
bit (Note 1)
MR2
MR1
MR3
Invalid in event counter mode.
This bit can neither be set nor reset. When read in event counter
mode, its content is indeterminate.
TCK1
TCK0
01
0 0 : Counts external signal's falling edges
0 1 : Counts external signal's rising edges
1 0 : Counts external signal's falling and
rising edges
1 1 : Inhibited
b3 b2
Nothing is assigned (i = 1, 2).
This bit can neither be set nor reset. When read, its content is
indeterminate.
Note 1: Valid only when input from the TBiIN pin is selected as the event clock.
If timer's overflow is selected, this bit can be “0” or “1”.
Note 2: Timer B0.
Note 3: Timer B1, timer B2.
Note 4: Set the corresponding port direction register to “0”.
Invalid in event counter mode.
Can be “0” or “1”.
Event clock select
0: Input from TBiIN pin (Note 4)
1: TBj overflow
(j = i-1; however, j = 2 when i = 0)
0 (Fixed to “0” in event counter mode; i = 0)
(Note 2)
(Note 3)
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