参数资料
型号: M30600E8GP
元件分类: 微控制器/微处理器
英文描述: 16-BIT, OTPROM, 10 MHz, MICROCONTROLLER, PQFP100
封装: 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100
文件页数: 68/139页
文件大小: 1782K
代理商: M30600E8GP
Mitsubishi microcomputers
M16C / 60 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
34
Pin
Memory expansion mode
Single-chip mode
Microprocessor mode
_______
Address bus, data bus, CS0 to CS3
Retains status before stop mode
_____
______
________
_________
RD, WR, BHE, WRL, WRH
“H”
__________
HLDA, BCLK
“H”
ALE
“H”
Port
Retains status before stop mode Retains status before stop mode
CLKOUT
When fc selected
Valid only in single-chip mode
“H”
When f8, f32 selected
Valid only in single-chip mode
Retains status before stop mode
Table 1.13. Port status during stop mode
Clock Output
In single-chip mode, the clock output function select bits (bits 0 and 1 at address 000616) enable f8, f32, or
fc to be output from the P57/CLKOUT pin. When the WAIT peripheral function clock stop bit (bit 2 at address
000616) is set to “1”, the output of f8 and f32 stops when a WAIT instruction is executed.
Stop Mode
Writing “1” to the all-clock stop control bit (bit 0 at address 000716) stops all oscillation and the microcom-
puter enters stop mode. In stop mode, the content of the internal RAM is retained provided that VCC re-
mains above 2V.
Because the oscillation of internal clock
, f1 to f32, fc, fc32, and fAD stops in stop mode, peripheral functions
such as the A-D converter and watchdog timer do not function. However, timer A and timer B operate
provided that the event counter mode is set to an external pulse, and UART0 and UART1 functions pro-
vided an external clock is selected. Table 1.13 shows the status of the ports in stop mode.
Stop mode is cancelled by a hardware reset or interrupt. If an interrupt is to be used to cancel stop mode,
that interrupt must first have been enabled.
When shifting to stop mode, the main clock division select bit 0 (bit 6 at 000616) is set to “1”.
Clock Generating Circuit
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